/challenges-projects/design-challenges/path2programmable/b/blog/posts/completed-developing-zynq-ultrascale-mpsoc-software-with-xilinx-sdk-lab-1-lab-2-lab-3-and-lab-4Lab 1 is very simple and helps you get familiar Zynq MPSoC hardware platform. Avnet uses a pre-built archived hardware platform to show you the ropes. They use an HDF file, which I have never seen before. The file is written out from Vivado. It contaen-USTelligent Community 12https://community.element14.com/challenges-projects/design-challenges/path2programmable/b/blog/posts/completed-developing-zynq-ultrascale-mpsoc-software-with-xilinx-sdk-lab-1-lab-2-lab-3-and-lab-4Sat, 26 Oct 2019 23:25:55 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:4a08b11b-5f57-497e-b6ef-66ad8f6a8126aspork421<p>I am a beginner with FPGAs and found that between the labs and the well written lessons, I could easily complete the lessons. The hard part was always troubleshooting when things didnt go right. </p><p>&nbsp;</p><p>Good or write up.</p><img src="https://community.element14.com/aggbug?PostID=7998&AppID=242&AppType=Weblog&ContentType=0" width="1" height="1">https://community.element14.com/challenges-projects/design-challenges/path2programmable/b/blog/posts/completed-developing-zynq-ultrascale-mpsoc-software-with-xilinx-sdk-lab-1-lab-2-lab-3-and-lab-4Wed, 23 Oct 2019 01:32:36 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:4a08b11b-5f57-497e-b6ef-66ad8f6a8126cmelement140<p>I think you are going to be more impressed when you see all design automation such as the auto connection in the later labs. Really well-thought-out tool.</p><img src="https://community.element14.com/aggbug?PostID=7998&AppID=242&AppType=Weblog&ContentType=0" width="1" height="1">