PIIP Project - Port DPU TRD for Ultra96v1 to v2

RE: PIIP Project - Port DPU TRD for Ultra96v1 to v2

rscasny — Fri, 06 Dec 2019 19:17:15 GMT

Ralph,

Enjoyed your blogs. You did a great job of explaining what you were doing as you were doing it. Very helpful.

Thanks for the project in progress as well.

Randall

--element14 Team

RE: PIIP Project - Port DPU TRD for Ultra96v1 to v2

theomain — Tue, 03 Dec 2019 22:20:32 GMT

Hello Ralph, well done on sucessfully porting this tutorial to the ultra96v2.

I have also been trying to do but haven't had any success. Similarly I am using vivado and petalinux 2018.3. So far i generated the design in vivado and exported without any problems and then followed the instructions to generate the BOOT.BIN and image.ub. At this point I attempted to boot up the petalinux system but it gets stuck initializing (INIT led is red and DONE led never lights up).

In your description you mentioned that you modified the "UART and memory configuation for the v2". The UART modification I performed was to change stdout to uart_1 and did not change any memory parameters, could you elaborate slightly on this please?

Any help is greatly appreciated. Cheers. Theo

RE: PIIP Project - Port DPU TRD for Ultra96v1 to v2

aspork42 — Tue, 26 Nov 2019 16:33:36 GMT

Nice job! Way to go with all the troubleshooting to get it all working.