Blog

Path to Programmable 3 - Winner's Announcement

rscasny — Wed, 27 Sep 2023 21:28:27 GMT

What is Path to Programmable III? Path III is the third session in the element14 Community’s structured FPGA-based SoC training. The first Path training program was held in 2018 and focused on programmable logic devices PLDs and featured the AV...(read more)

Demonstration and Outcome - Blog 6

rahulkhanna — Sun, 10 Sep 2023 15:34:46 GMT

Welcome to the final blog on building a Bottle Cap Inspection System using Machine Vision. In this project, we plan to create an automated visual inspection system that can detect defects in bottle caps, such as cracks, deformation, and missing parts...(read more)

LCD click interface on Ultra96-V2 - Blog 5

rahulkhanna — Fri, 08 Sep 2023 08:07:43 GMT

Welcome to blog 5 for the Ultra96-V2 development board. In this blog, we'll dive into interfacing an LCD Click board with the Ultra96-V2, allowing you to display information, messages, or graphics on an LCD screen. Let's get started...(read more)

Path to Programmable III Final Project Blog: CarSafety Device using Xilinx ZYNQ FPGA

taifur — Wed, 06 Sep 2023 17:26:06 GMT

Introduction This is the final project blog for Path to Programmable III using the MiniZed Xilinx ZYNQ FPGA board. In this project blog, I will show how I made an internal car safety device using some Grove sensors and the MiniZed FPGA board. From a ...(read more)

Final Project - Process of medical images

cghaba — Wed, 06 Sep 2023 12:08:11 GMT

The project was developed in the Health part of the Market path though the application is related also to Vision path. The project is intended to allow the process of medical images in order to improve diagnostics or provide radiologists with a tool ...(read more)

Morse Code from MNIST: Accelerating Convolutional Neural Networks in Ultra96v2 using Tensil AI - Final

rajivbishwokarma — Wed, 06 Sep 2023 03:51:52 GMT

Table of Contents Introduction Training a CNN-based neural network on MNIST? Converting PyTorch model to ONNX Tensil AI accelerator hardware for Ultra96v2 Generating Vivado bitstream for Ultra96v2 LED hardware design Creating PYNQ image for Tensil A...(read more)

Interfacing LMS6DSL Click Mezzanine with Ultra96-V2 Using Vitis - Blog 4

rahulkhanna — Tue, 05 Sep 2023 19:42:09 GMT

In this tutorial, we will guide you through the process of interfacing the LMS6DSL Click Mezzanine with the Ultra96-V2 development board using Xilinx Vitis. The LMS6DSL Click Mezzanine is equipped with a sensor that can measure both acceleration and ...(read more)

Exploring Xilinx Vitis | Zynq MPSoC - Blog 3

rahulkhanna — Tue, 05 Sep 2023 18:56:14 GMT

In this blog post, we will set up the Vitis IDE, where we will walk through the process of creating a workspace, configuring a Platform project, and creating an Application project. The final stage in the hardware export process...(read more)

PTPIII - Final Project - Ultra-Gimbal

saadtiwana_int — Tue, 05 Sep 2023 15:48:15 GMT

Foreword I have some past experience of working with FPGAs. I am, by no mean, an expert, but learnt what I needed to get the jobs done for some medium complexity projects. All my previous FPGA projects were running some IPs in the FPGA fabric an...(read more)

Path to Programmable III Training Blog #06: MiniZed Color Sensor Webserver - Final

flyingbean — Tue, 05 Sep 2023 02:23:12 GMT

Table of Contents Introduction Project Structure MiniZed Color Sensor Webserver Demo Conclusions References Introduction A color sensor is a type of transducer that converts one form of energy into another form. Digilent PMOD color module ...(read more)

Path to Programmable III Training Blog #6 Final Blog-Build Machine Vision Project with Vitis-AI on IP-DPU

fyaocn — Tue, 05 Sep 2023 02:14:26 GMT

Build Machine Vision Project with Vitis-AI on IP-DPU Table of Contents 1 Ultra96v2 and Vitis AI 2 Create Vitis AI development docker environment 3 Create hardware design with vivado 3 Model Hub and Vitis AI 4 Create the IMG 1 Ultra96v2 and...(read more)

P2P3 - Final Blog - Object Detection and Localisation on ultra96v2 using AI/ML

manihatn — Tue, 05 Sep 2023 00:29:53 GMT

Introduction: The final project is based on AI/Machine Learning within the Core Technology Path. The aim of the project was to accelerate object detection and localisation on ultra96v2. I have some prior experience in FPGA design, but this ...(read more)

Path to Programmable III : Ultra96V2 : ADAS Camera Processing through Deep Learning Unit (DPU) | Final Project Blog |

prashanthgn.engineer — Mon, 04 Sep 2023 22:58:43 GMT

Hello Element14 Challengers Introduction Current trend in Automotive segment moving towards different level of autonomous driving. Advanced Driver Assistance system is the key for the Autonomous vehicles. Where the sensor clusters is i...(read more)

Path to Programmable III Training Blog #02: MiniZed Board Requirement & Details

vishnu123 — Mon, 04 Sep 2023 19:21:23 GMT

MiniZed is a single-core Zynq 7Z007S development board. With the advent of the latest cost-optimized portfolio from Xilinx, this board targets entry-level Zynq developers with a low-cost prototyping platform.This compact design features on-boa...(read more)

Path to Programmable III Training Blog 01: Kit Unboxing & MiniZed Board Understanding

vishnu123 — Mon, 04 Sep 2023 18:40:08 GMT

Unboxing the MiniZed Box Contains⦁ MiniZed Board – 1 ⦁ Micro USB cable – 1⦁ SDSoc License from AMD Xilinx – 1 . MiniZed Board Understanding Features⦁ Xilinx Zynq single-core SoC XC7Z007S-1CLG225C.⦁ Micron storage: 512MB DDR3L...(read more)