Move Data Between BRAM and DDR3 Memories

RE: Move Data Between BRAM and DDR3 Memories

flyingbean — Fri, 09 Jun 2023 16:36:58 GMT

I am in this lab now. I found that BRAM to BRAM data transfer did not work for Vitis 2021.1 tool chain. I checked Path to Programmable I training blogs. It looked like that the same source code: dma_test.c for MiniZed worked back to 2018

RE: Move Data Between BRAM and DDR3 Memories

DAB — Thu, 08 Jun 2023 18:31:00 GMT

Nice post.

Yes, DMA steals those clock cycles, which can cause a slowdown in processing.

RE: Move Data Between BRAM and DDR3 Memories

javagoza — Thu, 08 Jun 2023 15:22:27 GMT

Nice blog [mention:205bffe10f0246d586c5ce54b6bb22ed:e9ed411860ed4f2ba0265705b8793d05] You'll probably be interested in looking at an accelerated solution for data transfer between memories like the AXI Central Direct Memory Access (CDMA) core

AXI Central DMA Controller (xilinx.com)

Arty Z7 - AI accelerator using AXI CDMA - Hackster.io