RE: Concentrating on HDL before P2P

Fred27 — Mon, 12 Nov 2018 13:53:54 GMT

I'm still enjoying P2P but also getting a lot out of just some simple Verilog/VHDL too. The book that Randall recommended is definitely worth a read.

I've also decided that some CPLDs would be good alongside the FPGAs so have order a couple of cheap dev boards - Coolrunner II and 9500XL. I like the idea of some simple logic components at the opposite end of the scale from something like the Zynq.

The 9500XL in particular looks useful. On the plus side:

It's a simple self contained device. No external storage or other bitstream loading needed.
It only needs a single 3.3V supply.
It's available in an easily solderable QFP package.
The Verilog/VHDL you write is exactly the same.

On the down side:

It's not the newest tech.
You need to use the older ISE dev environment - which just about runs on Windows 10 with a hack or two.

RE: Concentrating on HDL before P2P

aspork42 — Sat, 10 Nov 2018 04:52:56 GMT

Hi Dave - I agree with you! There is a lot going on that, even as a participant, I am not fully aware of. I just did a post linking to a few videos I found online which give a lot of good info on FPGAs and some other related material. (Link here to my post:)

Labs 4-5-6 done! Path to the end???

There are two EEVBlog videos and a third video that really enhanced my understanding of the underlying principals of the FPGA world.

Keep in mind that I don't have much FPGA experience other than doing updates on FPGAs before this course; so I am about as green as it gets (for regular readers of the E14 community anyways).

I also recently commented on another P2P blog about this. I spent an entire semester in college just talking about the nuts and bolts of PDF files; how they are created; how they deal with image files, layers, font subsets... I could talk ad nauseam on just the "export to PDF" dialog box and its related settings. For this program, I don't yet have a complete understanding yet why I have to check "include bitstream" other than the lesson told me to.

I will agree that about 50% this course is "how to use Vivado", another 25% is "how the Zynq SoC works" and maybe 10-15% is 'nuts and bolts' FPGA stuff. (and some other miscellaneous stuff for the last 10-15%). Obviously knowing Vivado is important for a true day-to-day embedded programmer; but I would not rate this corse for a "100-level EE" type audience.

I am really loving the learning experience, and the creators have done a great job in the lessons to make the easy enough to follow and successfully complete. I am looking forward to creating my own project and I only hope I have enough knowledge create this from scratch.