/challenges-projects/design-challenges/pathtoprogrammable/b/blog/posts/path-to-programmable---lab-8---pwm-controllerAbout:Through Avnet, Xilinx and Element14, a training program to learn about the Zynq 7000 platform which is System On Chip combining an FPGA with an ARM processor. This comes to the students as complete development board packed with goodies like a wen-USTelligent Community 12https://community.element14.com/challenges-projects/design-challenges/pathtoprogrammable/b/blog/posts/path-to-programmable---lab-8---pwm-controllerSun, 02 Dec 2018 16:55:24 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:1f5de70a-71de-49d9-bcbf-40eba1dde8barscasny1<p>James,</p><p>&nbsp;</p><p>You said:</p><p>&nbsp;</p><p>&quot;<span>The last portion of the lesson is to remove the JTAG to AXI Interconnect. This is done since it would be the last thing before a project is made final. The JTAG to AXI wouldn&#39;t be required in a final product according to the lessons. (Side note: I&#39;ve been in many-a-meeting arguing over what is really required in the final product...)&quot;</span></p><p>&nbsp;</p><p><span>I presume you are referring to the &quot;final product&quot; for this program? If so, the final project is very open. Basically, build some kind of project using the Minized. </span></p><p>&nbsp;</p><p><span>There simple ideas would be along these lines:</span></p><p>&nbsp;</p><ul><li>sensor / monitoring</li><li>image processing</li><li>simple game</li></ul><img src="https://community.element14.com/aggbug?PostID=5974&AppID=209&AppType=Weblog&ContentType=0" width="1" height="1">https://community.element14.com/challenges-projects/design-challenges/pathtoprogrammable/b/blog/posts/path-to-programmable---lab-8---pwm-controllerSat, 24 Nov 2018 20:03:47 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:1f5de70a-71de-49d9-bcbf-40eba1dde8baDAB0<p>Very good update, well done.</p><p>&nbsp;</p><p>DAB</p><img src="https://community.element14.com/aggbug?PostID=5974&AppID=209&AppType=Weblog&ContentType=0" width="1" height="1">