<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>FPGA - 03 - TCL introduction and BRAMs !</title><link>/challenges-projects/design-challenges/pathtoprogrammable/b/blog/posts/fpga---03---tcl-introduction-and-brams</link><description>Hey everyone., ZynqHW_2017_4_lab_4_v11 So let&amp;#39;s continue onward with setting up our basics for TCL.After a brief read through the lab, I plan to use Vivado in tcl mode (non GUI mode). Let&amp;#39;s see if we can change ports in a block diag...</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: FPGA - 03 - TCL introduction and BRAMs !</title><link>https://community.element14.com/challenges-projects/design-challenges/pathtoprogrammable/b/blog/posts/fpga---03---tcl-introduction-and-brams</link><pubDate>Sat, 19 Jan 2019 21:04:36 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:17c2704b-bc15-45b2-a69b-77ece69d2223</guid><dc:creator>DAB</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Nice update.&lt;/p&gt;&lt;p&gt;&amp;nbsp;&lt;/p&gt;&lt;p&gt;DAB&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=6336&amp;AppID=209&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>