If this is NOT a Design Challenge, what is the 'Path to Programmable' training project? Here's the story...
Origins of the Project
About a year ago, the element14 team turned its attention to Programmable Logic Devices (PLDs). Given the depth of content and breadth of projects on the Community, we saw PLDs as an area of electronics that deserved a lot more attention. Thus, we began sponsoring discussions on designing with programmable devices, and with the help of Avnet we sponsored RoadTests and hosted a related webinar. But it was really our members' comments about the reality of designing with PLDs that motivated us to launch this professional development training project.
What Our Members Told Us about PLDs
Through our member discussions, we learned about PLDs from a developer's point of view. One of our Top Members stressed the need to find the right end-application that truly required a PLD as a key factor in choosing a PLD over a processor in hardware design. Another member stressed the importance of a change in mindset from sequential programming to logical building blocks. Finally, nearly all of our members agreed that there is a significant learning curve needed to master the tools necessary to program PLDs. It was this last discussion point—the learning curve challenge—that the element14 team found interesting, and we thought it merited a deeper exploration. The outcome of this exploration was the birth of the Path to Programmable training project.
What Is the Goal of the Project?
The Path to Programmable training project will train five element14 members by providing them with free FPGA/SoC training modules with lab exercises. Once the training has been completed, the trainees will build a project with the MiniZedTM development board based on what they have learned.
In return for both the FREE training and the MiniZedTM development board, the five trainees will blog regularly on element14 to report about their learning experience, covering both the high points and the challenges of learning to program FPGA/SoC devices. The blogs will be read by the community and the project's sponsor to learn more about how to make the path to developing with programmable devices easier to realize.
What Will the Trainees Learn?
Any element14 member can apply to be a Path to Programmable sponsored trainee, but there are prerequisites, so please read the Application Instructions page before submitting an application. A course syllabus has been posted on the Course Syllabus page.
The official trainees will receive an Avnet MiniZedTM Development Board to complete the lab exercises and build their graduation project.
How To Apply?
Any element14 member can apply to be a Path to Programmable sponsored trainee. But there are prerequisites and specific questions to be answered in the application, so please read the Application Instructions page before submitting an application.
The training project will cover three phases: (I) enrollment, (II) training with labs, and (III) project building. The important dates are:
|Enrollment Begin:||July 26 2018|
|Enrollment Ends:||August 27 2018|
|RoadTesters Selected:||September 1 2018|
|Training Begins:||September 7 2018|
|Training Ends:||October 21 2018|
|Project Building Begins:||October 28 2018|
|Project Building Ends:||January 14 2019|
One of the key ways we can understand the learning curve challenge of designing with PLDs is for our trainees to provide us feedback about their training experience. Hence, they will be REQUIRED to blog frequently, from the start of the training through the completion of the project building phase. We want to learn about the high points and challenges of their experience, and this is critical to understanding the learning curve challenge that so many people experience when first trying to build hardware with PLDs.
As with any skills-building experience, there will be times when you need to rely on someone for help. To assist our trainees, we have arranged for mentors from our sponsor Xilinx, Avnet, and from senior element14 Community members. Please visit the Mentors page to learn more.
As a thank you for participating in the training project, and completing the training and project building, we will offer the trainees these graduation awards:
Designing with Xilinx FPGAs: Using Vivado
FLUKE 3000 FC - Wireless Digital Multimeter
Pro's Kit Electronic Tool Kit
The Path to Programmable is NOT a Design Challenge. It is a professional development training project sponsored by Xilinx in conjunction with the element14 Community. element14 members who submit applications are competing to receive FPGA/SoC training only.
For any general questions about the Path to Programmable training project, please post a comment on this page.
To keep up-to-date with the Path to Programmable training project, please bookmark this project.
The deadline for application submissions is 27 August 2018.