<?xml version="1.0" encoding="UTF-8" ?>
<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Summer of FPGA</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/</link><description>Build your dream application with the Digilent Cmod S7. Submit your application and build your project using the Spartan-7 FPGA. </description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/number-plate-recognition-3-implementing-block-ram-using-verilog?CommentId=94825d5c-6d83-4a52-970d-cef579501611</link><pubDate>Sat, 11 May 2024 13:05:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:94825d5c-6d83-4a52-970d-cef579501611</guid><dc:creator>bincy</dc:creator><description>hello can you please share detailed cide in verilog</description></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/security-camera-3-testing-the-sd-card-driver-367553867?CommentId=a697286a-b2d7-4290-bec1-278e22b5da31</link><pubDate>Fri, 29 Mar 2024 06:30:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:a697286a-b2d7-4290-bec1-278e22b5da31</guid><dc:creator>arjunpattonathil</dc:creator><description>Sir can I do this project in DE-0 Nano FPGA Using Quartus</description></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/number-plate-recognition-4-loading-an-image-to-fpga?CommentId=99ed15bb-4da7-48bb-9e6d-112512fd5437</link><pubDate>Wed, 05 Jul 2023 10:59:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:99ed15bb-4da7-48bb-9e6d-112512fd5437</guid><dc:creator>aditik</dc:creator><description>Hi, Can you please share parameter.v file with us? it will be very helpful for me thank you</description></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/audio-synth-4-use-pwm-to-control-led?CommentId=635f140e-80f5-458a-97be-21b1ab32d089</link><pubDate>Fri, 05 May 2023 13:14:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:635f140e-80f5-458a-97be-21b1ab32d089</guid><dc:creator>cstanton</dc:creator><description>Blog moved to correct group.</description></item><item><title>Wiki Page: Winners Announcement - Summer of FPGA Design Challenge</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents/27374/winners-announcement---summer-of-fpga-design-challenge</link><pubDate>Tue, 17 May 2022 19:26:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:0f0e5e1b-88b0-4ef1-823b-b31da990072e</guid><dc:creator>pchan</dc:creator><description>Join us, in congratulating the winners of the Summer of FPGA Design Challenge with Diglient&amp;#39;s Cmod S7 This challenge has flexed everything our challengers have learned during the Summer of FPGA ! Summer of FPGA Design Challenge About this Challenge | Dates | The Judges | The Kit | The Prizes | Technical Resources | Example Application | Terms &amp;amp; Conditions | Related Blog | Summer of FPGAs: Digilent | The Challengers | The Winners The winners will win the following prizes and anyone who hit the Finisher criteria will get the finisher prize. Winners will be sent prizes to the address on their application and will be contacted by danzima The Prizes Prize Prize Category Grand Prize* Digilent Analog Discovery Pro AD3450 USB Runner Up* Digilent Analog Discovery Pro ADP 3250 Digilent Digital Discovery Finisher Prize Multicomp Digital Multimeter *Or local equivalent Winner Hack CPUMOD S7 - Rebuilding a CPU in FPGA pandoramc This project is an amazing example of rebuilding a working CPU inside an FPGA, the project is well made, the blogs are well written and honestly blew our minds a little. https://community.elementa14.com/challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/hack-cpumod-s7-5-peripheral-remapping Runner Up Liquid Level Monitoring with a Pressure Sensor guillengap www.youtube.com/watch Using the FPGA to calibrate and monitor liquid level, great use of FPGA in Vivado, Blog were well written and they really showed all their math! FPGA Security Camera - Finisher angelo76 www.youtube.com/watch This project uses the CMOD S7 FPGA board to interface the OV7670 camera and save the image data to SD card. This security camera can be triggered either by movements, loud sounds, fire, or by manually pushing the button. Security Hardware Accelerator - Finisher fyaocn Security Hardware Accelerator uses FPGA to encode signals from host hardware and return encryption codes back. Great FPGA usage and very detailed blogs LiFi: The Sequence Detector - Finisher kluivertcorreia LiFi: The Sequence Detector. I plan on using a sequence detector in unwrapping a framed packet, by detecting the start or end bytes or any sort of command byte. In this blog I will be implementing a 4-bit sequence detector to simplify the process of the creating the state diagram. Judges loved how Very Detailed the blogs are with lots of theory. FPGA Audio Synthesis - Finisher a33333 This project is the creation of a test bench and a collection of Verilog modules for a FPGA-based, musical synthesizer that uses subtractive synthesis for sound generation hardware and return encryption codes back. Arduino for Implementation and CMOD S7 for Synthesis. Project is also public on GitHub FPGA ANPR - Numberplate recognition. - Finisher taifur This is a automatic number plate reading platform using just the Cmod S7 and a camera. This project is especially exciting as Taifur is new to FPGAs and made great use of publicly avalible libraries and research.</description><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/summer_5F00_of_5F00_fpga">summer_of_fpga</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/digilent">digilent</category></item><item><title>Wiki: Documents</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents</link><pubDate>Tue, 17 May 2022 19:26:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:ede4a1f2-fe4b-4eca-8f1e-fae62ca455d9</guid><dc:creator /><description /></item><item><title>File: Liquid Level Monitoring using Pressure Sensor and CMOD S7</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/m/managed-videos/145701</link><pubDate>Fri, 29 Apr 2022 11:03:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:75a77c92-6a67-4334-80cd-1d31dcbbab05</guid><dc:creator>element14 Community</dc:creator><description>Pending ...</description><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/xilinx%2bsdk">xilinx sdk</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/vivado">vivado</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/MPX2050DP">MPX2050DP</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/liguid%2blevel%2bmonitoring">liguid level monitoring</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/cmod%2bs7">cmod s7</category></item><item><title>File: Liquid Level Monitoring using Pressure Sensor and CMOD S7 - Journey</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/m/managed-videos/145571</link><pubDate>Thu, 28 Apr 2022 21:01:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:0984585a-3a80-44e0-a98a-9fdf52a92ffb</guid><dc:creator>pchan</dc:creator><description>Pending ...</description><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/pressure%2bsensor">pressure sensor</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/MPX2050DP">MPX2050DP</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/Liquid%2blevel%2bmonitoring">Liquid level monitoring</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/digilent%2bcmod%2bc7">digilent cmod c7</category></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents/27374/winners-announcement---summer-of-fpga-design-challenge?CommentId=f3e200b8-7928-4ad7-a0c3-1a26b4d35f9d</link><pubDate>Thu, 10 Mar 2022 01:06:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:f3e200b8-7928-4ad7-a0c3-1a26b4d35f9d</guid><dc:creator>dougw</dc:creator><description>Congratulations. FPGA is an ambitious topic.</description></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents/27374/winners-announcement---summer-of-fpga-design-challenge?CommentId=55e45c37-3cd2-416c-bfdd-031b457dd180</link><pubDate>Tue, 08 Mar 2022 10:12:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:55e45c37-3cd2-416c-bfdd-031b457dd180</guid><dc:creator>javagoza</dc:creator><description>Congratulations to all. Very good projects to learn about the uses of FPGAs. A pity not having had time to participate.</description></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents/27374/winners-announcement---summer-of-fpga-design-challenge?CommentId=6dc594d3-7e90-45df-a504-dbddeb6d0475</link><pubDate>Sun, 06 Mar 2022 18:50:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:6dc594d3-7e90-45df-a504-dbddeb6d0475</guid><dc:creator>DAB</dc:creator><description>Congratulations all. I wish I had been up to competing, this was a great opportunity.</description></item><item><title>Wiki Page: Summer of FPGA - Meet the Challengers and Updated Dates</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents/27333/summer-of-fpga---meet-the-challengers-and-updated-dates</link><pubDate>Thu, 03 Mar 2022 22:17:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:c817cd9e-1f78-4d39-aed4-9e13ca39e961</guid><dc:creator>pchan</dc:creator><description>Meet the Challengers of the Summer of FPGA Design challenge Summer of FPGA Design Challenge About this Challenge | Dates | The Judges | The Kit | The Prizes | Technical Resources | Example Application | Terms &amp;amp; Conditions | Related Blog | Summer of FPGAs: Digilent | The Challengers | The Winners The element14 Community is pleased to introduce the Summer of FPGAs Design Challenge , in partnership with Digilent . Join me in congratulating the Official Challengers of the Summer of FPGA Design Challenge , these challengers will be shipped the Cmod S7 Free of charge. kluivertcorreia moi8765 Fred27 guillengap alrms kurst811 dhruvapbhat vishwasn dirigaca11 pronetomadness a33333 taifur fyaocn girardi celcius1 rlewicki angelo76 pandoramc prashanth206 vinayyn rndmnkiii maxpowerr @walking_off_with_smile The Cmod S7 is a small, 48‐pin DIP form factor board, built around the Xilinx Spartan 7 FPGA. These selected challengers will receive the FREE board to help power up their FPGA project! What can you build? Example applications could include: Image Recognition Home Scientific Equipment Signal Processor Proof of Concept Processor Off Loading System To make enough time for the holiday period and delivery of the kits, we have updated the Project Due deadlines. Updated Competition Dates Project Phases Dates Application Period CLOSED Application Deadline CLOSED Challengers Announced Now Build Period 22nd November 2021 - 31st January 2022 Projects Due 31st January 2022 Winners Announced February 2022 Prizes Shipped February 2022 The Terms Selected official applicants will be chosen to receive the &amp;quot;Kit&amp;quot; listed above. These successful applicants will be our sponsored challengers, and they must use Diglient&amp;#39;s Cmod S7 within their project, and publish their final code and designs on the Community for others to use. Those not chosen as sponsored challengers may also join the competition and be eligible to win prizes, but they must base their projects around the kit listed above and adhere to all terms and conditions of the challenge. They need to post their progress and final project as at least 5 blog posts before the closing date (see above) , when projects are due. Posts which use the FPGA most creatively, are media rich with photos, videos, and code samples will be viewed more favorably in the judging process. Please read the full terms and conditions of the challenge, attached below.</description><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/summer_5F00_of_5F00_fpga">summer_of_fpga</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/digilent">digilent</category></item><item><title>Wiki Page: Summer Of FPGAs - Design Challenge</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents/23154/summer-of-fpgas---design-challenge</link><pubDate>Thu, 03 Mar 2022 17:47:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:5db017b5-6b5a-43ab-bc53-b1e0cbc50f60</guid><dc:creator>pchan</dc:creator><description>Summer of FPGA Design Challenge About this Challenge | Dates | The Judges | The Kit | The Prizes | Technical Resources | Example Application | Terms &amp;amp; Conditions | Related Blog | Summer of FPGAs: Digilent | The Challengers | The Winners The Summer of FPGAs has been a groovy series of educational events on FPGA-related topics. Now, this is your chance to flex your FPGA muscles and put your skills to the test, by enrolling in our latest design challenge ! players.brightcove.net/.../index.html The Challenge The element14 Community is pleased to introduce the Summer of FPGAs Design Challenge , in partnership with Digilent . Submit your application with a summary describing an FPGA project of your choice, using Diglient&amp;#39;s Cmod S7 for a chance to win a range of amazing prizes. The possibilities are endless—refer to the examples below to see what you could build. The Cmod S7 is a small, 48‐pin DIP form factor board, built around the Xilinx Spartan 7 FPGA. The selected 30 challengers will receive the FREE board to help power up their FPGA project! What can you build? Example applications could include: Image Recognition Home Scientific Equipment Signal Processor Proof of Concept Processor Off Loading System The Sponsored Kit The Specs Digilent Cmod S7 Buy Now Buy Now It has 32 FPGA digital I/O signals, 2 FPGA analogue input signals, an external power input rail, and ground are routed to 100‐mil‐spaced through‐hole pins. The Cmod S7 is well suited for use with solderless breadboards. At just 0.7&amp;quot; by 3.05&amp;quot; inches, it can be loaded in a standard socket and used in embedded systems. The board also includes a programming ROM, clock source, USB programming and data transfer circuit, power supplies, LEDs, and buttons. Xilinx Spartan‐7 FPGA (XC7S25‐1CSGA225C) 4MB quad‐SPI flash memory Powered from USB or 5V external supply connected to DIP pin 24 USB‐JTAG programming circuitry, USB‐UART bridge Push‐buttons and LEDs Expansion connectors 48‐pin DIP form‐factor header Be Rewarded on the Community For entering and taking part in the Design Challenge competition, you&amp;#39;ll be rewarded the following badges: Apply to join the Design Challenge and receive a badge and points for applying! Make sure you&amp;#39;ve thought your application through, made it original and your own work. If you are building upon someone else&amp;#39;s work, make sure you cite your sources. Direct copies of work will not be accepted. Post your first blog! We expect updates on how your Design Challenge project is going, so don&amp;#39;t hold back, tell us your thoughts, difficulties, and how you&amp;#39;re progressing. Remember that you&amp;#39;re assessed based upon your updates, and don&amp;#39;t be afraid - other challengers and members are there to help you with any problems you have, and it helps the staff to keep an eye on you! 5 blogs! Wow, has it really been that long? We hope you&amp;#39;ll keep us updated about your project at least once every two weeks, for 10 weeks. We&amp;#39;ll not be impressed if you only put a one-liner in there, that&amp;#39;s what messages are for. Blogs are to make sure you&amp;#39;re giving us all of the juicy detail, trials and tribulations of what&amp;#39;s going on, and it keeps everyone honest! Even if you&amp;#39;re not a challenger in the Design Challenge, we appreciate every member who joins in and gives a helping hand to applicants and members. If your messages are found to be helpful, we want to acknowledge that and reward you! The Prizes Prize Prize Category Grand Prize* Digilent Analog Discovery Pro AD3450 USB Runner Up* Digilent Analog Discovery Pro ADP 3250 Digilent Digital Discovery Finisher Prize Multicomp Digital Multimeter *Or local equivalent The Judges Digilent Technical Judge Team element14 Community Judges element14 Community Team Need help? Comment and read the resources below: Technical Resources: Start up Reference: https://reference.digilentinc.com/reference/programmable-logic/cmod-s7/start User Manual: https://digilent.com/reference/programmable-logic/cmod-s7/reference-manual?redirect=1 Use Xilinx Analog-to-Digital (XADC) with breadboardable Spartan 7 FPGA module Use Xilinx Analog-to-Digital (XADC) with breadboardable Spartan 7 FPGA module Mechanical Drawings (DXF) https://digilent.com/reference/_media/reference/programmable-logic/cmod-s7/cmod_s7_dimensions.zip Callout Description Callout Description 1 48-pin DIP form factor head 7 UART status LED 2 FPGA programming DONE LED 8 Shared USB JTAG/UART port 3 Pmod connector 9 Power good LED 4 User push buttons 10 Spartan-7 FPGA 5 User LEDs 11 SPI Flash 6 Use tri-color LED Example Projects Analyzing DAC, ADC, and SPI Data with the Analog Discovery Studio Cmod S7-25 Microblaze XADC Demo Cmod S7-25 Out-Of-Box Demo Pmod I2S2 FPGA Volume Control Demo Software Notes: The Cmod S7 can be programmed with Digilent&amp;#39;s Adept software. Digilent Adept is a unique and powerful solution which allows you to communicate with Digilent system boards and a wide assortment of logic devices. Find out more about Adept here . To create and modify designs for your Cmod S7, you can use Xilinx&amp;#39;s Vivado Design Suite. Vivado is a software designed for the synthesis and analysis of HDL designs. Both variants of the Cmod S7 are supported by the free WebPACK edition of the Vivado Design Suite. If you are using the MicroBlaze Soft Processor Core from Xilinx, you can make use of the Vitis Core Development Kit or Xilinx Software Development Kit to create embedded applications for your Cmod S7. The Dates To make enough time for the holiday period and delivery of the kits, we have updated the Project Due deadlines. Updated Competition Dates Project Phases Dates Application Period CLOSED Application Deadline CLOSED Challengers Announced CLOSED Build Period 22nd November 2021 - 31st January 2022 Projects Due 31st January 2022 Winners Announced February 2022 Prizes Shipped February 2022 The Terms Selected official applicants will be chosen to receive the &amp;quot;Kit&amp;quot; listed above. These successful applicants will be our sponsored challengers, and they must use Diglient&amp;#39;s Cmod S7 within their project, and publish their final code and designs on the Community for others to use. Those not chosen as sponsored challengers may also join the competition and be eligible to win prizes, but they must base their projects around the kit listed above and adhere to all terms and conditions of the challenge. They need to post their progress and final project as at least 5 blog posts before the closing date (see above) , when projects are due. Posts which use the FPGA most creatively, are media rich with photos, videos, and code samples will be viewed more favorably in the judging process. Please read the full terms and conditions of the challenge, attached below. Ready to join the challenge? Then Apply Here ! If you are not successful in becoming a sponsored challenger but still want to enter, all you need to do is use the Kit as described above in your project and adhere to the same Terms and Conditions for a chance to be our winner! Non-sponsored challengers are eligible for the Finisher and Winner Prizes as well. Attachments: community.element14.com/.../Summer-Of-FPGA-Design-Challenge-Terms-Version-1.pdf Summer Of FPGA Design Challenge Terms Version 1.pdf</description><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/design_5F00_challenge">design_challenge</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/summer_5F00_of_5F00_fpga">summer_of_fpga</category><category domain="https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/tags/digilent">digilent</category></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/audio-synth-7---design-challenge-ends-project-continue?CommentId=b3281533-f27f-493d-bf9d-1dc3c1adee37</link><pubDate>Sun, 13 Feb 2022 05:18:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:b3281533-f27f-493d-bf9d-1dc3c1adee37</guid><dc:creator>kluivertcorreia</dc:creator><description>Nice! a good amount of reasearch and experimentation,</description></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents/23154/summer-of-fpgas---design-challenge?CommentId=034c1950-16f5-4fd7-b20b-fbad9e26b0ba</link><pubDate>Sun, 13 Feb 2022 05:08:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:034c1950-16f5-4fd7-b20b-fbad9e26b0ba</guid><dc:creator>kluivertcorreia</dc:creator><description>oh wait you get badges! well in that case even I haven&amp;#39;t been rewarded Regardless check this out: LiFi #5 - Block Explanation - Blog - Summer of FPGA - element14 Community</description></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/lifi-5---block-explanation?CommentId=769797f7-c847-475e-8bab-db9e2bf94b7c</link><pubDate>Wed, 09 Feb 2022 20:06:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:769797f7-c847-475e-8bab-db9e2bf94b7c</guid><dc:creator>kluivertcorreia</dc:creator><description>UPDATE: Hi everyone, as promised I updated #4 and #5 to be coherent with the previous blogs, hope y&amp;#39;all like it! NOTE: some of the images (like waveform one) are very high res and must be opened up in a separate tab.</description></item><item><title>File: 8461.compressed-final</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/m/managed-videos/145116</link><pubDate>Wed, 09 Feb 2022 20:00:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:f00ffb1c-1770-460f-a3e0-2d95639b036f</guid><dc:creator>element14 Community</dc:creator><description /></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/lifi-4---custom-lifi-peripheral?CommentId=b3eb33c0-34f0-4c46-8f98-1c47bcb277e5</link><pubDate>Mon, 07 Feb 2022 16:31:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:b3eb33c0-34f0-4c46-8f98-1c47bcb277e5</guid><dc:creator>yesha98</dc:creator><description>Wow! Looks wonderful!</description></item><item><title>File: 8321.first-demo</title><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/m/managed-videos/145110</link><pubDate>Mon, 07 Feb 2022 16:13:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:d99b7e27-2f98-4c7d-b1e9-e760e5190e27</guid><dc:creator>element14 Community</dc:creator><description /></item><item><title /><link>https://community.element14.com/challenges-projects/design-challenges/summer-of-fpga/w/documents/23154/summer-of-fpgas---design-challenge?CommentId=3d81bdb5-af2c-4961-a5a0-69226ce986d0</link><pubDate>Thu, 03 Feb 2022 05:48:00 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:3d81bdb5-af2c-4961-a5a0-69226ce986d0</guid><dc:creator>angelo76</dc:creator><description>The same with me, not yet rewarded with the badge. /challenges-projects/design-challenges/summer-of-fpga/b/blog/posts/security-camera-6-project-demonstration-and-final-words</description></item></channel></rss>