About this Challenge | Dates | The Judges | The Kit | The Prizes | Technical Resources | Example Application | Terms & Conditions | Related Blog | Summer of FPGAs: Digilent
The Summer of FPGAs has been a groovy series of educational events on FPGA-related topics. Now, this is your chance to flex your FPGA muscles and put your skills to the test, by enrolling in our latest design challenge!
The Challenge
The element14 Community is pleased to introduce the Summer of FPGAs Design Challenge, in partnership with Digilent.
Submit your application with a summary describing an FPGA project of your choice, using Diglient's Cmod S7 for a chance to win a range of amazing prizes. The possibilities are endless—refer to the examples below to see what you could build.
The Cmod S7 is a small, 48‐pin DIP form factor board, built around the Xilinx Spartan 7 FPGA. The selected 30 challengers will receive the FREE board to help power up their FPGA project!
What can you build?
Example applications could include:
- Image Recognition
- Home Scientific Equipment
- Signal Processor
- Proof of Concept
- Processor Off Loading System
| The Sponsored Kit | The Specs |
|---|---|
Digilent Cmod S7
| It has 32 FPGA digital I/O signals, 2 FPGA analogue input signals, an external power input rail, and ground are routed to 100‐mil‐spaced through‐hole pins. The Cmod S7 is well suited for use with solderless breadboards. At just 0.7" by 3.05" inches, it can be loaded in a standard socket and used in embedded systems.
The board also includes a programming ROM, clock source, USB programming and data transfer circuit, power supplies, LEDs, and buttons.
|
Be Rewarded on the Community
For entering and taking part in the Design Challenge competition, you'll be rewarded the following badges:
 | Apply to join the Design Challenge and receive a badge and points for applying! Make sure you've thought your application through, made it original and your own work. If you are building upon someone else's work, make sure you cite your sources. Direct copies of work will not be accepted. |
 | Post your first blog! We expect updates on how your Design Challenge project is going, so don't hold back, tell us your thoughts, difficulties, and how you're progressing. Remember that you're assessed based upon your updates, and don't be afraid - other challengers and members are there to help you with any problems you have, and it helps the staff to keep an eye on you! |
 | 5 blogs! Wow, has it really been that long? We hope you'll keep us updated about your project at least once every two weeks, for 10 weeks. We'll not be impressed if you only put a one-liner in there, that's what messages are for. Blogs are to make sure you're giving us all of the juicy detail, trials and tribulations of what's going on, and it keeps everyone honest! |
 | Even if you're not a challenger in the Design Challenge, we appreciate every member who joins in and gives a helping hand to applicants and members. If your messages are found to be helpful, we want to acknowledge that and reward you! |
| Prize | Prize Category |
|---|---|
| Grand Prize*
|
Runner Up*
| |
 | Finisher Prize
Multicomp Digital Multimeter |
*Or local equivalent
| Digilent Technical Judge Team |  |
| element14 Community Judges element14 Community Team |  |
Need help? Comment and read the resources below:
Technical Resources:
Start up Reference:
https://reference.digilentinc.com/reference/programmable-logic/cmod-s7/start
User Manual:
https://digilent.com/reference/programmable-logic/cmod-s7/reference-manual?redirect=1
Use Xilinx Analog-to-Digital (XADC) with breadboardable Spartan 7 FPGA module
Use Xilinx Analog-to-Digital (XADC) with breadboardable Spartan 7 FPGA module
Mechanical Drawings (DXF)
https://digilent.com/reference/_media/reference/programmable-logic/cmod-s7/cmod_s7_dimensions.zip
| Callout | Description | Callout | Description |
|---|---|---|---|
| 1 | 48-pin DIP form factor head | 7 | UART status LED |
| 2 | FPGA programming DONE LED | 8 | Shared USB JTAG/UART port |
| 3 | Pmod connector | 9 | Power good LED |
| 4 | User push buttons | 10 | Spartan-7 FPGA |
| 5 | User LEDs | 11 | SPI Flash |
| 6 | Use tri-color LED |
Example Projects
- Analyzing DAC, ADC, and SPI Data with the Analog Discovery Studio
- Cmod S7-25 Microblaze XADC Demo
- Cmod S7-25 Out-Of-Box Demo
- Pmod I2S2 FPGA Volume Control Demo
Software Notes:
The Cmod S7 can be programmed with Digilent's Adept software. Digilent Adept is a unique and powerful solution which allows you to communicate with Digilent system boards and a wide assortment of logic devices. Find out more about Adept here.
To create and modify designs for your Cmod S7, you can use Xilinx's Vivado Design Suite. Vivado is a software designed for the synthesis and analysis of HDL designs. Both variants of the Cmod S7 are supported by the free WebPACK edition of the Vivado Design Suite.
If you are using the MicroBlaze Soft Processor Core from Xilinx, you can make use of the Vitis Core Development Kit or Xilinx Software Development Kit to create embedded applications for your Cmod S7.
To make enough time for the holiday period and delivery of the kits, we have updated the Project Due deadlines.
Updated Competition Dates
Project Phases | Dates |
|---|---|
| Application Period | CLOSED |
| Application Deadline | CLOSED |
| Challengers Announced | CLOSED |
| Build Period | 22nd November 2021 - 31st January 2022 |
| Projects Due | 31st January 2022 |
| Winners Announced | February 2022 |
| Prizes Shipped | February 2022 |
Selected official applicants will be chosen to receive the "Kit" listed above. These successful applicants will be our sponsored challengers, and they must use Diglient's Cmod S7 within their project, and publish their final code and designs on the Community for others to use. Those not chosen as sponsored challengers may also join the competition and be eligible to win prizes, but they must base their projects around the kit listed above and adhere to all terms and conditions of the challenge.
They need to post their progress and final project as at least 5 blog posts before the closing date (see above), when projects are due.
Posts which use the FPGA most creatively, are media rich with photos, videos, and code samples will be viewed more favorably in the judging process.
Please read the full terms and conditions of the challenge, attached below.
Ready to join the challenge? Then Apply Here!
If you are not successful in becoming a sponsored challenger but still want to enter, all you need to do is use the Kit as described above in your project and adhere to the same Terms and Conditions for a chance to be our winner! Non-sponsored challengers are eligible for the Finisher and Winner Prizes as well.
 | Summer Of FPGA Design Challenge Terms Version 1.pdf |