Blog - All Comments

RE: PanelDriver: A FPGA based HDMI to FPD-Link converter

romanSlave — Wed, 20 Dec 2023 22:55:12 GMT

Hello! I am most certainly intrigued and astonished by your work as I am currently in the process of constructing a project idea similar to yours described in this post. Although this is an older post, I would still be extremely thankful if you could share any insights, in case you continued working on this project. I am mostly interested if you managed to use the DMA for outputting video.

Kind regards.

RE: VidorScout - MKR Vidor 4000 Mobile Robot: Camera QR Code Recognition

saiidabifarraj — Sat, 16 Jul 2022 10:12:22 GMT

hello
need your help
i need to read the QR code not only recognize

regards

RE: VidorBreakout - Using the pins on the Mini PCIe connector of the Arduino MKR Vidor 4000

vimarsh_ — Sun, 15 Mar 2020 09:10:25 GMT

A great project!

This is the first time I have seen the mini PCIe of Vidor being put to use!

Just a question: Which service did you use to make that OCB?

RE: Vidor Clock - Powered by FPGA

piotrva — Wed, 24 Jul 2019 18:09:43 GMT

Why are you mentioning Xilinx FPGA, when on board of Arduino MKR Vidor there is Intel FPGA Cyclone 10 device!

RE: PanelDriver: A FPGA based HDMI to FPD-Link converter

jomoenginer — Mon, 22 Jul 2019 14:10:40 GMT

Congrats to [mention:3bdcb9becd5642429aa074c151e5457a:e9ed411860ed4f2ba0265705b8793d05] for winning the challenge and nice work for those who participated.

RE: bb-cpld - a robotics expansion board for the BeagleBone Black with an Altera MAX II EPM1270

Jan Cumps — Sun, 21 Jul 2019 19:39:50 GMT

Impressive!

I'm trying little baby steps to do something half similar, but using the onboard PRU:

Have as much as possible of the motor output pattern managed by the real time units, and the main controller only sending instructions.

The PRU should then output the pulse trains for the stepper drivers (I'm using DRV8711 - not for a particular reason, just because I have that one).

I'll be happy if I can eek out a pulse train out of the system with a controllable ramp up, max speed and ramp down ...

RE: PanelDriver: A FPGA based HDMI to FPD-Link converter

three-phase — Sun, 21 Jul 2019 08:05:41 GMT

Excellent project, you must have but in some serious work to complete this.

Kind regards.

RE: Display for Traffic Predictor - Cypress PSoC6 BLE Pioneer kit

three-phase — Tue, 16 Jul 2019 20:26:30 GMT

Nice little update to your traffic predictor [mention:4d09137f1e9b436c9f3672040f55771c:e9ed411860ed4f2ba0265705b8793d05], good luck with the future updates.

Kind regards.

RE: Vidor Clock - Powered by FPGA

DAB — Tue, 16 Jul 2019 19:15:47 GMT

Nice Post, but I would really like to see you walk through the circuit design for the FPGA and discuss how you implemented it using the tools available.

Thanks

DAB

RE: MKR VIDOR 4000 - Programmable Logic Project

aabhas — Tue, 16 Jul 2019 15:31:11 GMT

[mention:44fa45702fda4d95b457f69505107f36:e9ed411860ed4f2ba0265705b8793d05]

Thanks you provided me this amazing piece of hardware but I will also try to use its FPGA from Intel Quartus Lite , which actually I was not able to do.

Thanks

Aabhas Senapati

RE: Display for Traffic Predictor - Cypress PSoC6 BLE Pioneer kit

DAB — Mon, 15 Jul 2019 19:37:57 GMT

Nice post.

I am not sure you are going to get enough warning with the ultrasonic detector to help you much.

DAB

RE: VidorScout - MKR Vidor 4000 Mobile Robot: Assembly and Test

genebren — Mon, 15 Jul 2019 13:07:46 GMT

Nice looking robot platform. Good luck getting all the FPGA features up and running.

Nice job!

RE: Vidor's Toccata

alisterw — Mon, 15 Jul 2019 13:00:19 GMT

I was unable to attach the block diagram- illegal file type or some such message, so I took the PDF file and stuck it into Paint then printed as JPEG. Not ideal...Bottom bit is first...[View:/resized-image/__size/1600x764/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-9bfa068a-576e-4eab-953e-346ee53e7d5b/contentimage_5F00_190920.jpg:1600:764][View:/resized-image/__size/1600x764/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-9bfa068a-576e-4eab-953e-346ee53e7d5b/contentimage_5F00_190921.jpg:1600:764]

RE: VidorScout - MKR Vidor 4000 Mobile Robot: Assembly and Test

dubbie — Mon, 15 Jul 2019 11:21:33 GMT

Looks like a great mobile robot and it seems it might work too. It would be good to see a video of it moving about on the floor. I like the QR code recognition part and I will have to look into doing something similar. The part about not being able toget enough power sounds like a tag like for mobile robots as I think all mine have suffered from this, no matter how small or large they are.

Dubbie

RE: Vidor's Toccata

alisterw — Mon, 15 Jul 2019 10:25:04 GMT

Project day 16086.

Here is a block diagram of the system. It is a 1024-channel stereo sine wave generator. However I have not wired up the inputs, outputs or clocks and one or two other bits.

Also I have not yet worked out how to add two 10-bit data address generator block for the multiplexed NCO. The subtlety is that the second DAG needs to count 7 behind the other one, as 7 is apparently the latency of the MAC.

If anyone can assist I would appreciate it!

It assumes the NCO can run in one cycle. The NCO is multiplexed over 1024 channels. A sine look-up table converts the top part of each NCO output to a sine wave. The sine wave is multiplied by the left gain for that channel and accumulated.

Same goes for the right stereo channel.

After 1024 accumulates the left and right accumulators need to be cleared, which again is something left off.

Everything is pipelined and each block should run in one clock cycle.

It should be easy to copy this block N times until we either run out of silicon or get to 8,000 channels, which should be enough!

That is if it fits of course...