FPGA: a quadrature oscillator with rotary encoder control

RE: FPGA: a quadrature oscillator with rotary encoder control

dougw — Fri, 22 Oct 2021 14:19:56 GMT

Would a PSoC 4 have enough programmable fabric and speed to implement this function?

RE: FPGA: a quadrature oscillator with rotary encoder control

Jan Cumps — Thu, 21 Oct 2021 22:19:52 GMT

It works on the Zynq too, but strange enough,

only if I place the 3 individual blocks on the block diagram, and combine them there.

If I put the wrapped design on the block diagram, it doesn't work.

I'll retry from fresh tomorrow.

This is how it looks like now (+ action video):

[View:/resized-image/__size/620x244/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-0475cec6-bcd1-411e-8318-0674368ec63d/5224.contentimage_5F00_216673.png:620:244]

[View:https://players.brightcove.net/1362235890001/NkxiVJdjx_default/index.html?videoId=6278227959001:740:466]

edit: it works with the wrapper too. I made a typo and had assigned the reset of the quad generator to a rotary encoder pin.

fixed and all ok now:

[View:/resized-image/__size/609x485/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-0475cec6-bcd1-411e-8318-0674368ec63d/0456.contentimage_5F00_216675.png:609:485]

RE: FPGA: a quadrature oscillator with rotary encoder control

Jan Cumps — Thu, 21 Oct 2021 20:30:42 GMT

I'm trying if the exact same design runs on the Zynq.

[View:/resized-image/__size/620x229/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-0475cec6-bcd1-411e-8318-0674368ec63d/8688.contentimage_5F00_216672.png:620:229]

VHDL is unchanged. The clock and nReset come from the ARM µcontrollers this time

RE: FPGA: a quadrature oscillator with rotary encoder control

shabaz — Thu, 21 Oct 2021 18:38:58 GMT

Hi Jan,

This is great, fantastic work, I'm looking forward to trying it. I'm also going to print out the VHDL and try to follow it and learn..

I attempted a slightly similar idea and barely got the encoder functioning enough to control an output, but I was concerned I didn't know what the VHDL was creating in some places, and aborted until I understood it some more, so looking at your VHDL will help loads.

RE: FPGA: a quadrature oscillator with rotary encoder control

Jan Cumps — Thu, 21 Oct 2021 18:29:33 GMT

It works

[View:/resized-image/__size/620x388/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-0475cec6-bcd1-411e-8318-0674368ec63d/0211.contentimage_5F00_216667.png:620:388]

I had 1 error: the nReset pin was not in my constraint file. So it was always 0 and the circuit constantly in reset.

I changed the constraint file (also moved the clk_out to a PMOD pin named clock)

[embed:dc8ab71f-3b98-42d9-b0f6-e21e02a0f8e2:3ef06e6b-9b7d-4651-b12d-db8be7f5e991:type=text&text=net+nReset_in+++++++++++++++++++loc%3Dk15%3B%0Anet+clk_out+++++++++++++++++++++loc%3Dt7%3B]

and the image with the pins in the post above.

[View:/resized-image/__size/286x96/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-0475cec6-bcd1-411e-8318-0674368ec63d/4024.contentimage_5F00_216668.png:286:96]

RE: FPGA: a quadrature oscillator with rotary encoder control

DAB — Wed, 20 Oct 2021 20:12:30 GMT

Nice post Jan.

DAB