Follow the journey as eight element14 engineers learn to program FPGA\SoCs
Congratulations to first class of element14's Path to Programmable, an FPGA/SoC training program. Meet the graduates and read their final projects, featuring the Avnet MiniZed™ development board.
These are notes from the module 1 – chapter 2 Speedway video lecture.
Tools and tool flow .
The Vivado Design Suite WebPACK edition is free and it supports seven Zynq devices. The free tools include a simulator, device programmer, logic analyzer…
Hey Everyone,
After spending a few nights on this - I have decided my project is to be a "microphone" based project. Sounds simple enough right ? ( ) As I progressed, it has later on branched out to be something else entirely. Read on!
Aim:
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For my Path to Programmable project, I wanted to build something that would use both the PS & PL of the Zynq-7000.
The original plan was to build a logic analyzer that used BRAM & DRAM as a sample buffer, but I realized that I might not get it to work…
Intro:
I build this project mainly out of my need to watch videos on multiple devices. I use to see few lectures on my Home Laptop , Some on my Tab and very few on my mobile ,hence i maintain a copy of videos on all these devices and believe me it is…
Note: This is part 6 of a series on working with FPGAs and in particular the Xilinx Zynq-7000S Programmable System-on-Chip with ARM Cortex-A9 processing core. For part 1, click here: Xilinx ZYNQ System-on-Chip - Getting to know the MiniZed Board
For…
The Module 2 of the MiniZed Path to Programmable is focused on software development in xilinx fpga. The previous minized SW development ZYNQ blog can be read here
The Hardware related blogs are here Summary of Module 1 Path to Programmable ZYNQ HW blogs…
I made up a new case for the MiniZed with the video card installed.
I need to revise the cover with cutouts for the USB connector and the two jumpers on the video board.
Each half was a 5 hour print.
Scott
Overall Impressions
Well, I'll have to say this was a very interesting process. There were some delays, which collided with my schedule, there were some bumps, and there were some unexpected surprises. All of which come together to explain how we…
I have created with usage of FIR compiler IP a simple low pass filter. The low-pass filter is described by the formula: y(n) = 2y(n-1)-y(n-2)+x(n)-2x(n-6)+x(n-12). It has cut frequency around 11 Hz. I have used it for filtering and denoising a ECG signal…
About:
Through Avnet, Xilinx and Element14, a training program to learn about the Zynq 7000 platform which is System On Chip combining an FPGA with an ARM processor. This comes to the students as complete development board packed with goodies like a…
