re: Peripherals for Real Time Control Explained by phoenixcomm

phoenixcomm — Sun, 16 Oct 2016 22:58:53 GMT

Man on a Wednesday that i will tied up in the morning 9 till mostly noon or a little later. Since this will be recorded I will have to view it later in the day.

hope this will work.

Cris

re: Peripherals for Real Time Control Explained by rscasny

rscasny — Wed, 16 Nov 2016 16:05:37 GMT

Thanks to everyone who attended the webinar. To download the slides for this webinar, log into your myTI account (or create a new account if you don't have one) and then go here: www.ti.com/Webinar_Peripherals

re: Peripherals for Real Time Control Explained by rscasny

rscasny — Fri, 02 Dec 2016 15:54:24 GMT

What follows are answers posed by the webinar attendees:

Are they going to talk about the software tools and how easy it is to set up signal analysis to drive dynamic control? I am really curious on how easy it is for an engineer to set this board up and control its operations.

We package all of our SW(and HW design files) in our ControlSuite download package. This contains all baseline examples for this and all other C2000 MCUs. The examples set up the peripherals/pins in many common configurations. There is also a cloud based pinmux tool to autogenerate the pin config file, which is helpful on a device with this many signals.

http://www.ti.com/tool/controlsuite

https://dev.ti.com/ (the select the pinmux tab)

On LAUNCH PAD I observed 4 DACs, but it really has 28379D have only 3DACs. Why?

A)The DACs that are called out on the LP are from a legacy perspective were we have some RC circuitry to “create” a DAC from a PWM output. Indeed on this device there are dedicated output DACs as well that come out on ADCIN channels. They are:

ADCINA0-DACOUTA

ADCINA1-DACOUTB

ADCINB1-DACOUTC

Could you please explain the CLB inside the F28379D (function and benefit)...

A)This module allows us to add various encoder interfaces for industrial comms environment. Currently we support SIN/COS, EnDAT, BiSS, and Tamagawa encoder formats. There is plan to add Nikon and Hiperface formats in the future

Does J9 port have an independent connection as compared to the ones available on pins?

A)J9 is a HiRose connector to support bringing out many more signals than what the normal BP headers would allow. For the LAUNCHXL-F28379D I have used it to bring out EMIF1 signals. There are a few signals that have dual mapping to the upper LP tracks, they are:

1)GPIO34 – This has a hard connection to the Red LED D9. This serves as a Chip Select in the EMIF, so it may not be used; even if used the only artifact would be to light the LED

2)GPIO40/I2CSCAB – There is a jumper J13 on the top side that should be used to select if GPIO40 is mapped to the HiRose/J9 connector on the BP header J5. The function on the BP header is I2C B SCA. The function for the EMIF of GPIO40 is address line 4.

3)GPIO41/I2CSCLB – There is a jumper J11 on the top side that should be used to select if GPIO41 is mapped to the HiRose/J9 connector or the BP header J5. The function on the BP header is I2C B SCL. The function for the EMIF of GPIO41 is address line 5.

What’s the actual production state of F28377D and of F28379D ?

A)Every device in the TMS320F2837xx family is in full production status. This includes both single core and dual core variants.

On portal Ciiva the F28377D has status "Not recommended for new designs"; is this right?

A)This is incorrect, what I suspect is has happened is that for the experimenter kit we transitioned from using the F28377D device to the F28379D device when it was introduced(we try and use the superset device on our EVMs when possible). As such the TMDXCNCD28377D amd TMDXDOCK28377D were replaced by the TMDSCNCD28379D and the TMDSDOCK28379D respectively. In this sense the older kits and NRND, but not the devices themselves. I apologize as I can see how this is confusing. However, if you could give the exact url that shows this information I would like to make sure this is what is being referred to.

What is it that this launchpad has that the F28377s doesn't?

A)In terms of signal availability the use of the 337 ball device gave a lot more options.

Ability to bring out all 4 ADCs, 3 to the BP header and 1 dedicated for 16-bit mode with a signal conditioning circuit

Full EMIF1 on the bottom side connector

Sigma Delta demodulator inputs on the BP headers

Extra IOs on the BP that were previously No Connects

PWM signal availability not present on the 100 pin F28377S based LP

In terms of functional capability it is the addition of the 2nd core subsystem and the CLB(for encoder applications)