BEGIN:VCALENDAR VERSION:2.0 METHOD:PUBLISH BEGIN:VEVENT ORGANIZER:MAILTO: DTSTART:20210909T150000Z DTEND:20210909T160000Z LOCATION:On24 SUMMARY:Intro to Smart Embedded Vision (SEV) Using a PolarFire® FPGA DESCRIPTION;ENCODING=QUOTED-PRINTABLE:FG6BA== This session will provide a high-level understanding of Smart Embedded Vision and how to apply video pipeline concepts on a PolarFire FPGA. We will use the MPF300 Video Kit to implement a design receiving 4K video-data from two cameras, create a video pipeline and project a video-in-video on an High-Definition Multimedia Interface (HDMI®) Things you will learn and IPs used: Interfacing to cameras using MIPI® CSI2 Creation of an image-buffer using external DDR-memory Color Space Conversion and Image Enhancements Sending data to displays via HDMI 2.0 A short outlook into enhancing such designs with Machine Learning functionality will be given. contentimage_209566.png-604x334.png?sv=2016-05-31&sr=b&sig=Vvegxz2cmeOAkqYGut3PjDYfSJfTh0tZVgUPpURV0MY%3D&se=2026-04-12T23%3A59%3A59Z&sp=r&_=4e3hkf8rqmSDf5ylnZ05lg== Featured in the presentation: cKNWgaKg== Buy Now Buy Now The Presenter: contentimage_209567.jpg-205x205.jpg?sv=2016-05-31&sr=b&sig=9rDOi%2FnWrDG00PqkZhSH1hlP4SyCfRMurl3PTRl%2B%2BNM%3D&se=2026-04-12T23%3A59%3A59Z&sp=r&_=C1b6wkKdvRLBdX6wIcFZQA== Martin Kellermann, Business Development Manager for FPGA at Microchip Martin joined Microchip as Business Development Manager for FPGA covering EMEA. In this role Martin uses his deep FPGA experience to enable clients building optimized systems and achieve their requirements using Microchip FPGAs and SoCs. He has previous experience at Xilinx, where several application-notes were created and patents were filed and granted. X-ALT-DESC;FMTTYPE=text/html:

FG6BA==

This session will provide a high-level understanding of Smart Embedded Vision and how to apply video pipeline concepts on a PolarFire FPGA. We will use the MPF300 Video Kit to implement a design receiving 4K video-data from two cameras, create a video pipeline and project a video-in-video on an High-Definition Multimedia Interface (HDMI®)

 

Things you will learn and IPs used:

 

 

A short outlook into enhancing such designs with Machine Learning functionality will be given.

 

contentimage_209566.png-604x334.png?sv=2016-05-31&sr=b&sig=Vvegxz2cmeOAkqYGut3PjDYfSJfTh0tZVgUPpURV0MY%3D&se=2026-04-12T23%3A59%3A59Z&sp=r&_=4e3hkf8rqmSDf5ylnZ05lg==

Featured in the presentation:

cKNWgaKg==

Buy NowBuy Now

 

 

The Presenter:

 

 

contentimage_209567.jpg-205x205.jpg?sv=2016-05-31&sr=b&sig=9rDOi%2FnWrDG00PqkZhSH1hlP4SyCfRMurl3PTRl%2B%2BNM%3D&se=2026-04-12T23%3A59%3A59Z&sp=r&_=C1b6wkKdvRLBdX6wIcFZQA==
Martin Kellermann, Business Development Manager for FPGA at Microchip

Martin joined Microchip as Business Development Manager for FPGA covering EMEA. In this role Martin uses his deep FPGA experience to enable clients building optimized systems and achieve their requirements using Microchip FPGAs and SoCs.  He has previous experience at Xilinx, where several application-notes were created and patents were filed and granted.

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