BEGIN:VCALENDAR VERSION:2.0 METHOD:PUBLISH BEGIN:VEVENT ORGANIZER:MAILTO: DTSTART:20210901T160000Z DTEND:20210901T170000Z LOCATION:On24 SUMMARY:Summer of FPGA: Software and FPGA: How to Get the Bits to Flip? DESCRIPTION;ENCODING=QUOTED-PRINTABLE:contentimage_211429.png-423x119.png?sv=2016-05-31&sr=b&sig=I7l1C0OphSvMQxhqK8YVKWb1NpTr0uutRLHBYhOSnw0%3D&se=2026-04-19T23%3A59%3A59Z&sp=r&_=va28LLa+flXWMoYBeXP0EA== If you have experience programming CPUs or MCUs, the key concepts of programming FPGAs may be a bit difficult to grasp at first. In this entry level webinar, Monica Houston and Tom Curran will address the different approaches to programming FPGAs. In addition to covering the basics of getting the board setup by running the tcl build scripts from Avnet’s GitHub, this webinar will also demonstrate setting up a simple program in Vitis that controls GPIOs on the Ultra96. What you will learn by attending: How use Avnet’s build scripts to set up the programmable logic on Ultra96 FPGA vocabulary and the meanings of commonly used acronyms How to create a helloworld program for the Ultra96 using Vitis How to control GPIO on the Ultra96 How programming an FPGA is similar to and differs from programming a CPU The following hardware will be featured during this presentation: AES-ULTRA96-V2-G AES-ULTRA96-V2-G AES-ACC-U96-4APWR AES-ACC-U96-4APWR AES-ACC-U96-JTAG AES-ACC-U96-JTAG AES-ACC-U96-ME-SK AES-ACC-U96-ME-SK Buy Kit Buy Kit contentimage_211430.png-604x334.png?sv=2016-05-31&sr=b&sig=Jz3lWvSB6AFv9gh7Icgjl8KzYXAfZp7YF4YQa64Jz60%3D&se=2026-04-19T23%3A59%3A59Z&sp=r&_=aNtVEglCHzL3a33GtrsUCw== The Presenters: contentimage_211431.png-172x172.png?sv=2016-05-31&sr=b&sig=mYgZpuMclojCNxDC2dw1Caz6ek8lck86atdbuqL9VyE%3D&se=2026-04-19T23%3A59%3A59Z&sp=r&_=PjGHmCf3tEKb7OQmm33cjw== contentimage_211432.png-172x172.png?sv=2016-05-31&sr=b&sig=Uqbv8exjJxH%2B6oXQkj2%2FBlWqtLh2Pu3negUansD%2Fpis%3D&se=2026-04-19T23%3A59%3A59Z&sp=r&_=bDuxNm+MLcuTsHQ4abxjRA== Monica Houston, Machine Learning Engineer at Avnet Tom Curran, Senior Technical Marketing Engineer at Avnet At Avnet, I work on enabling machine learning on NXP boards, particularly MaaXBoard. Previously, I was employee #2 at Hackster.io. An avid maker and tinkerer, I also founded the Seattle Arduino Meetup. I have dabbled in a wide range of technologies, from web development to 3D printing, but I’m most captivated by artificial intelligence, in particular AI at the edge. I’m currently working on a master’s degree in Computer Science and Engineering at the University of Washington. I got sucked into the world of FPGAs and programmable logic early in my career working for a company that developed embedded controls for bottle labeling machines, and I’ve never looked back. I now work in Avnet's Products & Emerging Technologies group, mostly working on Linux and software applications for our Zed and UltraZed family of Zynq and Zynq MPSoC SOMs and SBCs like the Ultra96-V2. X-ALT-DESC;FMTTYPE=text/html:

contentimage_211429.png-423x119.png?sv=2016-05-31&sr=b&sig=I7l1C0OphSvMQxhqK8YVKWb1NpTr0uutRLHBYhOSnw0%3D&se=2026-04-19T23%3A59%3A59Z&sp=r&_=va28LLa+flXWMoYBeXP0EA==

If you have experience programming CPUs or MCUs, the key concepts of programming FPGAs may be a bit difficult to grasp at first. In this entry level webinar, Monica Houston and Tom Curran will address the different approaches to programming FPGAs.

In addition to covering the basics of getting the board setup by running the tcl build scripts from Avnet’s GitHub, this webinar will also demonstrate setting up a simple program in Vitis that controls GPIOs on the Ultra96.

What you will learn by attending:

How use Avnet’s build scripts to set up the programmable logic on Ultra96
FPGA vocabulary and the meanings of commonly used acronyms
How to create a helloworld program for the Ultra96 using Vitis
How to control GPIO on the Ultra96
How programming an FPGA is similar to and differs from programming a CPU

The following hardware will be featured during this presentation:

AES-ULTRA96-V2-GAES-ULTRA96-V2-G

AES-ACC-U96-4APWRAES-ACC-U96-4APWR
AES-ACC-U96-JTAGAES-ACC-U96-JTAG
AES-ACC-U96-ME-SKAES-ACC-U96-ME-SK

Buy KitBuy Kit

contentimage_211430.png-604x334.png?sv=2016-05-31&sr=b&sig=Jz3lWvSB6AFv9gh7Icgjl8KzYXAfZp7YF4YQa64Jz60%3D&se=2026-04-19T23%3A59%3A59Z&sp=r&_=aNtVEglCHzL3a33GtrsUCw==

The Presenters:

contentimage_211431.png-172x172.png?sv=2016-05-31&sr=b&sig=mYgZpuMclojCNxDC2dw1Caz6ek8lck86atdbuqL9VyE%3D&se=2026-04-19T23%3A59%3A59Z&sp=r&_=PjGHmCf3tEKb7OQmm33cjw==	contentimage_211432.png-172x172.png?sv=2016-05-31&sr=b&sig=Uqbv8exjJxH%2B6oXQkj2%2FBlWqtLh2Pu3negUansD%2Fpis%3D&se=2026-04-19T23%3A59%3A59Z&sp=r&_=bDuxNm+MLcuTsHQ4abxjRA==
Monica Houston, Machine Learning Engineer at Avnet	Tom Curran, Senior Technical Marketing Engineer at Avnet
At Avnet, I work on enabling machine learning on NXP boards, particularly MaaXBoard. Previously, I was employee #2 at Hackster.io. An avid maker and tinkerer, I also founded the Seattle Arduino Meetup. I have dabbled in a wide range of technologies, from web development to 3D printing, but I’m most captivated by artificial intelligence, in particular AI at the edge. I’m currently working on a master’s degree in Computer Science and Engineering at the University of Washington.	I got sucked into the world of FPGAs and programmable logic early in my career working for a company that developed embedded controls for bottle labeling machines, and I’ve never looked back. I now work in Avnet's Products & Emerging Technologies group, mostly working on Linux and software applications for our Zed and UltraZed family of Zynq and Zynq MPSoC SOMs and SBCs like the Ultra96-V2.

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