Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by Aniket_kumar_raj

Aniket_kumar_raj — Fri, 13 Mar 2026 16:15:40 GMT

This is going to be my headstart to FPGA development

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by battlecoder

battlecoder — Sun, 22 Mar 2026 06:36:11 GMT

I've only used a very simple FPGA platform in the past, and did very little with it beyond testing a "hello world"-like demo (I think it was an LED blinker). I've always found FPGAs to be very fascinating but rather intimidating beasts. I'll try to watch this. It might actually (and finally) get me into FPGAs.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by veluv01

veluv01 — Thu, 26 Mar 2026 14:00:21 GMT

Finally....Ultrascale+ in the Spartan, can't wait to test the performance of it.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by Eamon

Eamon — Thu, 26 Mar 2026 14:10:27 GMT

Great seminar topic! Showing more affordable devboards is nice for the maker community and also professionals, where switching FPGAs is more acceptable in the lower end range. Would be interested to see more use cases of the SCU35

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by JWx

JWx — Thu, 26 Mar 2026 14:19:22 GMT

JoRatcliffe webinar quiz re-appears after page reload/in every new tab, so one is unsure if it was already counted or needs to be repeated...

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by fyaocn

fyaocn — Thu, 26 Mar 2026 14:36:35 GMT

Understanding of FPGA needs prerequisite knowledge.

Attached datasheet cover only 2 pages.

Better give more documents about the board and IDEs in advance.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by HectorV

HectorV — Thu, 26 Mar 2026 15:30:13 GMT

Great webinar! The demos look pretty cool. For the price the SCU35 kit seems very powerful.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by pandoramc

pandoramc — Thu, 26 Mar 2026 15:41:40 GMT

For high noisy communication interfaces, is there interfaces for digital communication controllers such as differential drivers?

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by wolfgangfriedrich

wolfgangfriedrich — Thu, 26 Mar 2026 15:47:10 GMT

Very interesting content but the webinar spend about 15 minutes with introduction and marketing information. This is half of the whole webinar presentation time. This felt excessive especially as there are probably mostly technical folks on e14 listen to this.

There was an interesting question in the webinar feed:
As of vivado, what licenses are required? And what commercial IPs are available during the design process.
Users purchasing the kit get 1 year tools license for free (node locked, device locked). All the free IPs available AMD catalog are included

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by AdrianBD

AdrianBD — Thu, 26 Mar 2026 15:48:16 GMT

I'm starting in FPGAs and found this webinars very useful. I would like the webinars to belonger.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by Morris_kit

Morris_kit — Thu, 26 Mar 2026 16:00:18 GMT

Great session ! Perfect starting point to set a launchpad for diving into FPGA development and building projects.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by ldmort123

ldmort123 — Thu, 26 Mar 2026 16:04:12 GMT

It was a great webinar. As a beginner in FPGAs, I found it very useful for understanding this evaluation kit and its potential applications. I’m looking forward to the next webinar!

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by mustapha_belarbi

mustapha_belarbi — Thu, 26 Mar 2026 16:20:56 GMT

Thank you for the webinar. I found it very interesting, especially Example 3 on multi-signal recording, which is very close to what I am currently trying to achieve in my work: a real-time intelligent irrigation system where multiple environmental signals (soil moisture, temperature, flow, etc.) are continuously monitored and used to dynamically adjust irrigation decisions.

At present, I am working with a ZedBoard platform, but I am considering moving to Spartan UltraScale+ to go further, particularly for integrating more advanced AI-based processing.

Example 3 seems highly relevant to this transition. However, I would appreciate some clarification before investing in this solution:

- Would a multi-signal recording architecture be more efficient and scalable on Spartan UltraScale+ compared to a ZedBoard-based implementation?

- From your experience, do you consider Spartan UltraScale+ more suitable for edge-intelligent control systems like mine, especially when integrating real-time decision-making and AI inference?

A more detailed explanation of Example 3 would be extremely valuable for me, particularly to support the transition from classical FPGA designs to AI-enabled embedded systems.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by veluv01

veluv01 — Thu, 26 Mar 2026 16:42:25 GMT

Thanks for the webinar JoRatcliffe , it was a nice and brief for the info on the SCU35 and the Spartan US+ family FPGAs.Great to hear that the SCU200 will also be coming soon.

Here are my few thoughts,

1.The Q&A felt a bit short. It would be great to have more time for questions.

2.It would be great to see some performance benchmark slides for MicroBlaze V and DSP(maybe...it doesn't matter much since it's a DSP48E2 like in every US+?) performance for the Spartan US+ compared to the Spartan, Artix and Kintex,etc

3. A little more info on the Spartan UltraScale+ specs and architecture, especially the new Platform Management Controller, would help a lot.

4.An unboxing video of the kit would be a really nice addition for a getting started webinar!

I hope that there will be a webinar for the SCU200 too, since it would be really interesting to see what the Spartan UltraScale+ can all offer and what it's capable of.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by chloro

chloro — Thu, 26 Mar 2026 17:26:32 GMT

The examples were good, especially the different approaches like using MicroBlaze with Zephyr and implementing it all in the hardware. This helped me understand how the board can be used in different ways depending on the application.

One thing that I thought of while going through the presentation is that it would have helped if there were demonstrations of how the different interfaces on the board can be used in combination in one single setup, rather than the different demos. This is because the board has quite a few I/O interfaces, and understanding how to use them all in combination would have helped.

Also, maybe a little more information on how to handle the high-speed I/O interfaces, as this seemed like one of the major advantages of the board, although this aspect was not discussed in great detail.

Overall it was easy to follow and gave a good idea of what the board can be used for.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by jelektro

jelektro — Thu, 26 Mar 2026 17:52:59 GMT

The webinar was conducted in an accessible way and was technically sound. However, I would like to see more examples, preferably with the creation of each project presented from start to finish.

The second design example (SCU35 Data Acquisition) is very interesting. In future webinars, it would be great to see methods for connecting to a PC via high-speed communication interfaces such as USB3 or Gigabit Ethernet. The SCU35 would be an excellent choice as a control unit for high-speed logic analyzers or mixed-signal oscilloscopes. Unfortunately, the board does not include a built-in USB-FIFO interface, such as USB3 or USB2 High-Speed. It’s also a pity that a Gigabit Ethernet transceiver was not used.

re: Getting Started with the AMD Spartan™︎ UltraScale+™︎ FPGA SCU35 Eval Kit by wstod

wstod — Fri, 27 Mar 2026 16:34:34 GMT

Is it possible the developer path other than emulating classic CPU via softcore and RTOS overhead to use AI models via inference engines (interpreters) which omits FPGA advantages (parallel processing) over classic CPU architecture? For example generating directly cell fabric logic in VHDL or Verilog directly from High Level Languages as well from AI models?