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<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/"><channel><title>How To Rapidly Design the Power Supply Rails of Xilinx FPGAs &amp; SoCs</title><link>https://community.element14.com/learn/events/c/e/201</link><description>&lt;p style="margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/246x74/__key/telligent-evolution-extensions-calendar-calendarfiles/00-00-00-00-71/contentimage_5F00_107052.jpg"&gt;&lt;img alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/telligent/evolution/extensions/calendar/calendarfiles/00/00/00/00/71/contentimage_107052.jpg-246x74.jpg?sv=2016-05-31&amp;sr=b&amp;sig=2OfXtrB%2F6u8LBTMufo1y68aVO57XoXfiMN6p%2F%2F4unBw%3D&amp;se=2026-11-10T23%3A59%3A59Z&amp;sp=r&amp;_=GBGobGzFh9QyGKG18QLnbg==" style="max-height: 74px;max-width: 246px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt; &lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt; &lt;/p&gt;&lt;table border="1" class="jiveBorder" style="border:1px solid #000000;width:100%;"&gt;&lt;thead&gt;&lt;tr&gt;&lt;th style="border:1px solid black;border:1px solid #000000;padding:2px;color:#ffffff;background-color:#6690bc;text-align:center;" valign="middle"&gt;&lt;strong&gt;{tabbedtable} Tab Label&lt;/strong&gt;&lt;/th&gt;&lt;th style="border:1px solid black;border:1px solid #000000;padding:2px;color:#ffffff;background-color:#6690bc;text-align:center;" valign="middle"&gt;&lt;strong&gt;Tab Content&lt;/strong&gt;&lt;/th&gt;&lt;/tr&gt;&lt;/thead&gt;&lt;tbody&gt;&lt;tr&gt;&lt;td style="border:1px solid black;border:1px solid #000000;padding:2px;"&gt;Agenda&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;padding:2px;"&gt;&lt;p style="margin:0;padding:0px;"&gt; &lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;strong&gt;This webinar will demonstrate how Texas Instruments's Power Supply Reference Designs were used to quickly develop the power supply rails needed for Xilinx® Artix®-7, Spartan®-7, and Zynq®-7000 FPGAs &amp; SoCs.&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt; &lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;&lt;span style="text-decoration:underline;"&gt;&lt;em&gt;Agenda&lt;/em&gt;&lt;/span&gt; &lt;/strong&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt; &lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Xilinx – Overview of Cost-Optimized Portfolio&lt;/strong&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;–Overview of the Spartan-6/7, Artix-7, Zynq-7000 Families and Features&lt;/p&gt;&lt;p style="margin:0;"&gt;–Mobility across Cost-Optimized Device Families&lt;/p&gt;&lt;p style="margin:0;"&gt;–Applications across the IIoT Edge&lt;/p&gt;&lt;p style="margin:0;"&gt;–Power Requirements&lt;/p&gt;&lt;p style="margin:0;"&gt;–XPE Power Estimator Tool&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt; &lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;TI – Power Supply solutions designed for Xilinx&lt;/strong&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;–Building Blocks (Individual Products at-a-glance)&lt;/p&gt;&lt;p style="margin:0;"&gt;–Putting it Together – Block Diagrams (Xilinx Power Needs &lt;span style="font-size:14pt;"&gt;→ &lt;/span&gt;TI Solution)&lt;/p&gt;&lt;p style="margin:0;"&gt;–How We Put it Together (Example Designs for Rapid Prototyping)&lt;/p&gt;&lt;ul&gt;&lt;li&gt;TIDA-050000 Reference Design&lt;/li&gt;&lt;li&gt;PCB &amp; Prototyping Concept&lt;/li&gt;&lt;li&gt;TIDA-01480 Reference Design&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt; &lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="color:#e23d39;"&gt;&lt;strong&gt;Additional Information&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;a class="jive-link-external-small" href="http://www.ti.com/ww/en/power_management/FPGA/index.html" rel="nofollow ugc noopener" target="_blank"&gt;Power Management for FPGAs and Processors&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a class="jive-link-external-small" href="http://www.ti.com/tool/TIDA-050000" rel="nofollow ugc noopener" target="_blank"&gt;Integrated Power Supply Reference Design for Xilinx Artix®-7, Spartan®-7, and Zynq®-7000 FPGAs&lt;/a&gt;&lt;/li&gt;&lt;li&gt;&lt;a class="jive-link-external-small" href="http://www.ti.com/tool/TIDA-01480" rel="nofollow ugc noopener" target="_blank"&gt;Integrated Power Supply Reference Design for Xilinx Zynq® UltraScale+™ ZU2CG−ZU5EV MPSoCs&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td style="border:1px solid black;border:1px solid #000000;padding:2px;"&gt;Presenters&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;padding:2px;"&gt;&lt;p style="margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/182x227/__key/telligent-evolution-extensions-calendar-calendarfiles/00-00-00-00-71/contentimage_5F00_107053.jpg"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/telligent/evolution/extensions/calendar/calendarfiles/00/00/00/00/71/contentimage_107053.jpg-182x227.jpg?sv=2016-05-31&amp;sr=b&amp;sig=5baly6vIus260Xtvt415ffeVfuOcLObWOB9Q0YX7gMw%3D&amp;se=2026-11-10T23%3A59%3A59Z&amp;sp=r&amp;_=+hPsZMP16fTDyDSB1v27Og==" style="max-height: 227px;max-width: 182px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Brian Berner&lt;/strong&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;Brian joined Texas Instruments as an applications engineer in 2011 after earning his bachelor of science and master of science degrees in electrical engineering from Lehigh University. Prior to joining the Integrated Power Management team, Brian worked as an applications engineer supporting customers using the TPS6598x family of USB Type-C and PD Port Controllers while developing technical content to aid in product development.&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt; &lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/161x213/__key/telligent-evolution-extensions-calendar-calendarfiles/00-00-00-00-71/contentimage_5F00_107054.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/telligent/evolution/extensions/calendar/calendarfiles/00/00/00/00/71/contentimage_107054.png-161x213.png?sv=2016-05-31&amp;sr=b&amp;sig=bVcu2YWyIAvU%2FYgsUK%2BKxtBnGXD7SRiiLB5poF4MwbY%3D&amp;se=2026-11-10T23%3A59%3A59Z&amp;sp=r&amp;_=Mjrps/MTvOB631xZq702YQ==" style="max-height: 213px;max-width: 161px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Jayson Bethurem&lt;/strong&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;Jayson is the Product Line Manager for Xilinx’s Cost-Optimized Portfolio, which includes Spartan, Artix, and Zynq-7000 devices. With over 20 years of Xilinx design, technical support, training, and marketing experience, Jayson leads the design of multiple evaluation boards, such as the Spartan-6LX9 Microboard, Zedboard, and MicroZed.&lt;/p&gt;&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td style="border:1px solid black;border:1px solid #000000;padding:2px;"&gt;Webinar Recording&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;padding:2px;"&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;&lt;a class="jive-link-wiki-small" href="/learn/events/w/documents/3587/webinar-recording-how-to-rapidly-design-the-power-supply-rails-of-xilinx-fpgas-socs"&gt;Click here to view the recording.&lt;/a&gt;&lt;/strong&gt;&lt;/p&gt;&lt;/td&gt;&lt;/tr&gt;&lt;/tbody&gt;&lt;/table&gt;&lt;script&gt;window.top.e14.func.queueScripts.add(function() { window.top.e14.func.e14DynaloadTabbedTables.init(); });&lt;/script&gt;</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>re: How To Rapidly Design the Power Supply Rails of Xilinx FPGAs &amp; SoCs by rscasny</title><link>https://community.element14.com/learn/events/c/e/201</link><pubDate>Mon, 26 Mar 2018 16:38:59 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:dadb6cf4-bbf1-4807-b46e-65d495269359</guid><dc:creator>rscasny</dc:creator><description>&lt;p&gt;This webinar is open for enrollment. I'd like to add that I had a call with the presenters a few weeks ago and they gave me a brief tour of this webinar. It's very interesting. Lots of good information. It's a great how-to webinar. I really urge all members to attend.&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p&gt;Sincerely,&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p&gt;Randall Scasny&lt;/p&gt;&lt;p&gt;element14 Webinar Host&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>re: How To Rapidly Design the Power Supply Rails of Xilinx FPGAs &amp; SoCs by rscasny</title><link>https://community.element14.com/learn/events/c/e/201</link><pubDate>Mon, 26 Mar 2018 18:18:50 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:d5c7ee16-4a78-4926-840a-b8621d768ac1</guid><dc:creator>rscasny</dc:creator><description>&lt;p&gt;Multiple power supplies are required to power an FPGA. The separate sources provide the required power for the different FPGA resources. This allows different resources to work at different voltage levels for increased performance or signal strength while preserving a high immunity to noise and parasitic effects. Read more: &lt;a class="jive-link-external-small" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/ug786_PowerMethodology.pdf" rel="nofollow ugc noopener" target="_blank" title="https://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/ug786_PowerMethodology.pdf"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx13_1/ug786_PowerMethodology.pdf&lt;/a&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>re: How To Rapidly Design the Power Supply Rails of Xilinx FPGAs &amp; SoCs by rscasny</title><link>https://community.element14.com/learn/events/c/e/201</link><pubDate>Tue, 10 Apr 2018 15:59:44 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:3b28b7b8-e972-413c-ba54-db2bdb8db387</guid><dc:creator>rscasny</dc:creator><description>&lt;p&gt;I was in a meeting today where I learned the interest in FPGAs, especially for IoT use cases, is growing and growing. There's definitely a leap to go from developing with microcontrollers to FPFAs.&lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p&gt;FPGA power can be more involved, complex than MCUs have. I think this webinar is a good investment in your time to start learning what's involved and some tips in how to make the design process easier. I hope all of you sign up for this webinar. &lt;/p&gt;&lt;p&gt; &lt;/p&gt;&lt;p&gt;Sincerely,&lt;/p&gt;&lt;p&gt;Randall Scasny&lt;/p&gt;&lt;p&gt;Webinar Host&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>re: How To Rapidly Design the Power Supply Rails of Xilinx FPGAs &amp; SoCs by gecoz</title><link>https://community.element14.com/learn/events/c/e/201</link><pubDate>Thu, 26 Apr 2018 14:49:06 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:bb16b167-7963-43e4-b09d-6a5e03227b9a</guid><dc:creator>gecoz</dc:creator><description>&lt;p&gt;Another great webinar, thank you.&lt;/p&gt;&lt;p&gt;Fabio.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>re: How To Rapidly Design the Power Supply Rails of Xilinx FPGAs &amp; SoCs by rscasny</title><link>https://community.element14.com/learn/events/c/e/201</link><pubDate>Thu, 26 Apr 2018 20:56:20 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:7aed6640-ccef-4432-a1dc-a04a52a08268</guid><dc:creator>rscasny</dc:creator><description>&lt;p&gt;&lt;em&gt;To download the slides, please log into your myTI account, or register, and click &lt;a class="jive-link-external-small" href="https://www.ti.com/myti/docs/accesseventaction.tsp?actionId=2803" rel="nofollow ugc noopener" target="_blank"&gt;here&lt;/a&gt;&lt;/em&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item><item><title>re: How To Rapidly Design the Power Supply Rails of Xilinx FPGAs &amp; SoCs by rscasny</title><link>https://community.element14.com/learn/events/c/e/201</link><pubDate>Fri, 27 Apr 2018 20:33:58 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:a420c7bc-cc64-490a-bab1-afe34a79d00d</guid><dc:creator>rscasny</dc:creator><description>&lt;p&gt;The video recording is now available.&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;</description></item></channel></rss>