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<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/"><channel><title>Panelist Resources: Leveling Up on FPGA Skills</title><link>https://community.element14.com/learn/events/w/documents/27396/panelist-resources-leveling-up-on-fpga-skills</link><description /><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>Panelist Resources: Leveling Up on FPGA Skills</title><link>https://community.element14.com/learn/events/w/documents/27396/panelist-resources-leveling-up-on-fpga-skills</link><pubDate>Wed, 15 Dec 2021 16:20:59 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:6ab66510-f359-4c31-a297-6ae80d05073d</guid><dc:creator>tariq.ahmad</dc:creator><comments>https://community.element14.com/learn/events/w/documents/27396/panelist-resources-leveling-up-on-fpga-skills#comments</comments><description>Current Revision posted to Documents by tariq.ahmad on 12/15/2021 4:20:59 PM&lt;br /&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="text-decoration:underline;"&gt;&lt;strong&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/200x200/__key/communityserver-wikis-components-files/00-00-00-01-48/6523.contentimage_5F00_209366.png"&gt;&lt;img alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/6523.contentimage_209366.png-200x200.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=b%2Fi9njnYB8ER1j8ytb9sTUiW3uNswVVXQPsNZbugM4s%3D&amp;amp;se=2026-09-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=snms71tdPaNtsDalHMtICA==" style="max-height: 200px;max-width: 200px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="font-family:Calibri;"&gt;Lattice Product Portfolio:&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="color:#0563c1;font-family:Calibri;text-decoration:underline;"&gt;&lt;a class="jive-link-external-small" href="https://www.latticesemi.com/en/Products" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.latticesemi.com/en/Products&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="font-family:Calibri;"&gt;Lattice Development Tools: &lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="color:#0563c1;font-family:Calibri;text-decoration:underline;"&gt;&lt;a class="" href="https://www.latticesemi.com/en/Products#_58F82ED81585418A93A8EE6349B10899"&gt;https://www.latticesemi.com/en/Products#_58F82ED81585418A93A8EE6349B10899&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="font-family:Calibri;"&gt;LEC2, Lattice Training Partner: &lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="font-family:Calibri;"&gt;&lt;a class="jive-link-external-small" href="https://lec2-fpga.com/" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://lec2-fpga.com/&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;span&gt; &lt;/span&gt;Embedded Development Kit :&lt;a href="https://www.latticesemi.com/products/developmentboardsandkits/embeddedvisiondevelopmentkit"&gt;https://&lt;/a&gt;&lt;a href="https://www.latticesemi.com/products/developmentboardsandkits/embeddedvisiondevelopmentkit"&gt;www.latticesemi.com/products/developmentboardsandkits/embeddedvisiondevelopmentkit&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;span&gt; &lt;/span&gt;CrossLink-NX VIP Sensor Input Board&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;a href="https://www.latticesemi.com/products/developmentboardsandkits/crosslink-nx_vip_sensor_input"&gt;https://www.latticesemi.com/products/developmentboardsandkits/crosslink-nx_vip_sensor_input&lt;/a&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;span&gt; &lt;/span&gt;MachXO3LF Starter Kit:&lt;a href="https://www.latticesemi.com/products/developmentboardsandkits/machxo3lfstarterkit"&gt;https://&lt;/a&gt;&lt;a href="https://www.latticesemi.com/products/developmentboardsandkits/machxo3lfstarterkit"&gt;www.latticesemi.com/products/developmentboardsandkits/machxo3lfstarterkit&lt;/a&gt;&lt;/li&gt;
&lt;li&gt;&lt;span&gt; &lt;/span&gt;Lattice Solution Stacks:&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;sensAI:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.latticesemi.com/Solutions/Solutions/SolutionsDetails02/sensAI"&gt;https://www.latticesemi.com/Solutions/Solutions/SolutionsDetails02/sensAI&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;mVision:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.latticesemi.com/Solutions/Solutions/SolutionsDetails02/mVision"&gt;https://www.latticesemi.com/Solutions/Solutions/SolutionsDetails02/mVision&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Sentry:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.latticesemi.com/Solutions/Solutions/SolutionsDetails02/LatticeSentry"&gt;https://www.latticesemi.com/Solutions/Solutions/SolutionsDetails02/LatticeSentry&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;Automate:&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.latticesemi.com/Solutions/Solutions/SolutionsDetails02/Automate"&gt;https://www.latticesemi.com/Solutions/Solutions/SolutionsDetails02/Automate&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/208x138/__key/communityserver-wikis-components-files/00-00-00-01-48/0755.contentimage_5F00_209367.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/0755.contentimage_209367.png-208x138.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=QmOyKaebzkWLHQEJ3LadjUb7bqWT%2BqJ%2BJBxhqQSvEac%3D&amp;amp;se=2026-09-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=htMQojM/itYAKohUYesZRg==" style="max-height: 138px;max-width: 208px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;Software resources:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip FPGA Design &amp;amp; Implementation Tools: Libero SoC&lt;br /&gt; &lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/fpga/libero-software-later-versions"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/fpga/libero-software-later-versions&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip FPGA &amp;amp; SoC Tutorials&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;a href="https://www.microsemi.com/product-directory/fpgas-socs-training/4339-fpga-training-tutorials"&gt;https://www.microsemi.com/product-directory/fpgas-socs-training/4339-fpga-training-tutorials&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;High-level synthesis:&lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;SmartDebug: Probing your design without re-synthesis or re-implementation and hardware-based single-step debug&lt;br /&gt; &lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/programming-and-debug/smartdebug"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/programming-and-debug/smartdebug&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip SmartHLS Compiler&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/smarthls-compiler"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/smarthls-compiler&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;SmartHLS Tutorial (Sobel Filtering for Image Edge Detection)&lt;br /&gt; &lt;a href="https://www.microsemi.com/document-portal/doc_download/1245532-legup-hls-tutorial"&gt;https://www.microsemi.com/document-portal/doc_download/1245532-legup-hls-tutorial&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;SmartHLS Examples&lt;br /&gt; &lt;a href="https://github.com/MicrochipTech/fpga-hls-examples"&gt;https://github.com/MicrochipTech/fpga-hls-examples&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Low-power machine learning&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip Machine Learning Framework: VectorBlox &lt;br /&gt; &lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/vectorblox-accelerator-software-development-kit"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/vectorblox-accelerator-software-development-kit&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Introduction to Microchip VectorBlox Accelerator&lt;br /&gt; &lt;a href="https://youtu.be/a4-YiZ05QGU"&gt;https://youtu.be/a4-YiZ05QGU&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip VectorBlox Github repository&lt;br /&gt; &lt;a href="https://github.com/Microchip-Vectorblox/VectorBlox-SDK"&gt;https://github.com/Microchip-Vectorblox/VectorBlox-SDK&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;VectorBlox Video Kit Demo Guide&lt;br /&gt; &lt;a href="https://download-soc.microsemi.com/FPGA/outgoing/VectorBlox/VectorBlox_Launch_Collateral_v1.0/Demo+Guide.pdf"&gt;https://download-soc.microsemi.com/FPGA/outgoing/VectorBlox/VectorBlox_Launch_Collateral_v1.0/Demo+Guide.pdf&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;Device resources:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PolarFire SoC: Building a Linux Yocto Image and Controlling the MSS GPIOs&lt;br /&gt; &lt;a href="https://youtube.com/playlist?list=PL9B4edd-p2agS6QkXUZjAvjlPiyAO5RP0"&gt;https://youtube.com/playlist?list=PL9B4edd-p2agS6QkXUZjAvjlPiyAO5RP0&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PolarFire SoC Icicle Kit:&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;a href="https://youtube.com/playlist?list=PL9B4edd-p2ajvXj0ZflizZI4zgm3Jev_O"&gt;https://youtube.com/playlist?list=PL9B4edd-p2ajvXj0ZflizZI4zgm3Jev_O&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PolarFire SoC Bare Metal Applications from from Loosely Integrated Memory (LIM)&lt;br /&gt; &lt;a href="https://youtube.com/playlist?list=PL9B4edd-p2ahGOmnvJvFLvSID3N3-rJC6"&gt;https://youtube.com/playlist?list=PL9B4edd-p2ahGOmnvJvFLvSID3N3-rJC6&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PolarFire SoC Github&lt;br /&gt; &lt;a href="https://github.com/polarfire-soc"&gt;https://github.com/polarfire-soc&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip Low Power FPGAs&lt;br /&gt; &lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/low-power-fpgas"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/low-power-fpgas&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/254x142/__key/communityserver-wikis-components-files/00-00-00-01-48/0250.contentimage_5F00_209368.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/0250.contentimage_209368.png-254x142.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=A4lB%2FpEbLkE9KMjJ6wUZrNAYSzccItIP1L0nn9L8ly4%3D&amp;amp;se=2026-09-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=lmLdnRilbXhZqHb56xMSTg==" style="max-height: 142px;max-width: 254px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0;"&gt;Welcome to the Xilinx Wiki!&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0;"&gt;The purpose of the wiki is to provide you with the tools you need to complete projects and tasks which use Xilinx products.&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0;"&gt;&lt;span style="text-decoration:underline;"&gt;Vivado Tools:&lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Xilinx Tool Downloads:&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/download" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/download&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Vivado Design Suite Tutorial - Design Flows Overview&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug888-vivado-design-flows-overview-tutorial.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug888-vivado-design-flows-overview-tutorial.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Vivado Design Suite Tutorial - Embedded Processor Hardware Design&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug940-vivado-tutorial-embedded-design.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug940-vivado-tutorial-embedded-design.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Vitis&amp;nbsp; Embedded Software Development Flow Documentation&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/hly1569525384514.html" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/hly1569525384514.html&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;text-decoration:underline;"&gt;Community Resources:&lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Xilinx Community Portal:&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/community.html" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/community.html&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Xilinx Community Forums:&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://forums.xilinx.com/" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://forums.xilinx.com/&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Xilinx YouTube&lt;br /&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.youtube.com/user/XilinxInc" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.youtube.com/user/XilinxInc&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The MicroZed Chronicles by Adam Taylor:&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.adiuvoengineering.com/microzed-chronicles-archive" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.adiuvoengineering.com/microzed-chronicles-archive&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="http://hackster.io/" rel="noopener noreferrer" target="_blank"&gt;Hackster.io&lt;/a&gt; &amp;ndash; Xilinx Page&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.hackster.io/xilinx" rel="noopener noreferrer" target="_blank"&gt;https://www.hackster.io/xilinx&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;text-decoration:underline;"&gt;Processor Solutions &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;MicroBlaze &amp;ndash; Free, 32-bit soft-core CPU&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/products/design-tools/microblaze.html" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/products/design-tools/microblaze.html&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;MicroBlaze Quick Start Guide: &lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/quick_start/microblaze-quick-start-guide-with-vitis.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/quick_start/microblaze-quick-start-guide-with-vitis.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Arm Cortex-M on Xilinx:&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.arm.com/resources/designstart/designstart-fpga" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.arm.com/resources/designstart/designstart-fpga&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Zynq-7000 SoC: Embedded Design Tutorial: A Hands-On Guide to Effective Embedded System Design&lt;br /&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1165-zynq-embedded-design-tutorial.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1165-zynq-embedded-design-tutorial.pdf&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Zynq UltraScale+ MPSoC: Embedded Design Tutorial: A Hands-On Guide to Effective Embedded System Design&lt;br /&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1209-embedded-design-tutorial.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1209-embedded-design-tutorial.pdf&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Versal ACAP Design Guide&lt;br /&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1273-versal-acap-design.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1273-versal-acap-design.pdf&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;
</description></item><item><title>Panelist Resources: Leveling Up on FPGA Skills</title><link>https://community.element14.com/learn/events/w/documents/27396/panelist-resources-leveling-up-on-fpga-skills/revision/1</link><pubDate>Wed, 15 Dec 2021 15:55:37 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:6ab66510-f359-4c31-a297-6ae80d05073d</guid><dc:creator>tariq.ahmad</dc:creator><comments>https://community.element14.com/learn/events/w/documents/27396/panelist-resources-leveling-up-on-fpga-skills#comments</comments><description>Revision 1 posted to Documents by tariq.ahmad on 12/15/2021 3:55:37 PM&lt;br /&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="text-decoration:underline;"&gt;&lt;strong&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/200x200/__key/communityserver-wikis-components-files/00-00-00-01-48/6523.contentimage_5F00_209366.png"&gt;&lt;img alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/6523.contentimage_209366.png-200x200.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=b%2Fi9njnYB8ER1j8ytb9sTUiW3uNswVVXQPsNZbugM4s%3D&amp;amp;se=2026-09-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=snms71tdPaNtsDalHMtICA==" style="max-height: 200px;max-width: 200px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="font-family:Calibri;"&gt;Lattice Product Portfolio:&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="color:#0563c1;font-family:Calibri;text-decoration:underline;"&gt;&lt;a class="jive-link-external-small" href="https://www.latticesemi.com/en/Products" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.latticesemi.com/en/Products&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="font-family:Calibri;"&gt;Lattice Development Tools: &lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="color:#0563c1;font-family:Calibri;text-decoration:underline;"&gt;&lt;a class="" href="https://www.latticesemi.com/en/Products#_58F82ED81585418A93A8EE6349B10899"&gt;https://www.latticesemi.com/en/Products#_58F82ED81585418A93A8EE6349B10899&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="font-family:Calibri;"&gt;LEC2, Lattice Training Partner: &lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span style="font-family:Calibri;"&gt;&lt;a class="jive-link-external-small" href="https://lec2-fpga.com/" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://lec2-fpga.com/&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/208x138/__key/communityserver-wikis-components-files/00-00-00-01-48/0755.contentimage_5F00_209367.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/0755.contentimage_209367.png-208x138.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=QmOyKaebzkWLHQEJ3LadjUb7bqWT%2BqJ%2BJBxhqQSvEac%3D&amp;amp;se=2026-09-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=htMQojM/itYAKohUYesZRg==" style="max-height: 138px;max-width: 208px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;Software resources:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip FPGA Design &amp;amp; Implementation Tools: Libero SoC&lt;br /&gt; &lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/fpga/libero-software-later-versions"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/fpga/libero-software-later-versions&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip FPGA &amp;amp; SoC Tutorials&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;a href="https://www.microsemi.com/product-directory/fpgas-socs-training/4339-fpga-training-tutorials"&gt;https://www.microsemi.com/product-directory/fpgas-socs-training/4339-fpga-training-tutorials&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&lt;span&gt;High-level synthesis:&lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;SmartDebug: Probing your design without re-synthesis or re-implementation and hardware-based single-step debug&lt;br /&gt; &lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/programming-and-debug/smartdebug"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-and-soc-design-tools/programming-and-debug/smartdebug&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip SmartHLS Compiler&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/smarthls-compiler"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/smarthls-compiler&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;SmartHLS Tutorial (Sobel Filtering for Image Edge Detection)&lt;br /&gt; &lt;a href="https://www.microsemi.com/document-portal/doc_download/1245532-legup-hls-tutorial"&gt;https://www.microsemi.com/document-portal/doc_download/1245532-legup-hls-tutorial&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;SmartHLS Examples&lt;br /&gt; &lt;a href="https://github.com/MicrochipTech/fpga-hls-examples"&gt;https://github.com/MicrochipTech/fpga-hls-examples&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;Low-power machine learning&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip Machine Learning Framework: VectorBlox &lt;br /&gt; &lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/vectorblox-accelerator-software-development-kit"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/vectorblox-accelerator-software-development-kit&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Introduction to Microchip VectorBlox Accelerator&lt;br /&gt; &lt;a href="https://youtu.be/a4-YiZ05QGU"&gt;https://youtu.be/a4-YiZ05QGU&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip VectorBlox Github repository&lt;br /&gt; &lt;a href="https://github.com/Microchip-Vectorblox/VectorBlox-SDK"&gt;https://github.com/Microchip-Vectorblox/VectorBlox-SDK&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;VectorBlox Video Kit Demo Guide&lt;br /&gt; &lt;a href="https://download-soc.microsemi.com/FPGA/outgoing/VectorBlox/VectorBlox_Launch_Collateral_v1.0/Demo+Guide.pdf"&gt;https://download-soc.microsemi.com/FPGA/outgoing/VectorBlox/VectorBlox_Launch_Collateral_v1.0/Demo+Guide.pdf&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;span&gt;&amp;nbsp;&lt;/span&gt;&lt;/p&gt;
&lt;p&gt;Device resources:&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PolarFire SoC: Building a Linux Yocto Image and Controlling the MSS GPIOs&lt;br /&gt; &lt;a href="https://youtube.com/playlist?list=PL9B4edd-p2agS6QkXUZjAvjlPiyAO5RP0"&gt;https://youtube.com/playlist?list=PL9B4edd-p2agS6QkXUZjAvjlPiyAO5RP0&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PolarFire SoC Icicle Kit:&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&lt;a href="https://youtube.com/playlist?list=PL9B4edd-p2ajvXj0ZflizZI4zgm3Jev_O"&gt;https://youtube.com/playlist?list=PL9B4edd-p2ajvXj0ZflizZI4zgm3Jev_O&lt;/a&gt;&lt;/p&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PolarFire SoC Bare Metal Applications from from Loosely Integrated Memory (LIM)&lt;br /&gt; &lt;a href="https://youtube.com/playlist?list=PL9B4edd-p2ahGOmnvJvFLvSID3N3-rJC6"&gt;https://youtube.com/playlist?list=PL9B4edd-p2ahGOmnvJvFLvSID3N3-rJC6&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;PolarFire SoC Github&lt;br /&gt; &lt;a href="https://github.com/polarfire-soc"&gt;https://github.com/polarfire-soc&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Microchip Low Power FPGAs&lt;br /&gt; &lt;a href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/low-power-fpgas"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/low-power-fpgas&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/254x142/__key/communityserver-wikis-components-files/00-00-00-01-48/0250.contentimage_5F00_209368.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/0250.contentimage_209368.png-254x142.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=A4lB%2FpEbLkE9KMjJ6wUZrNAYSzccItIP1L0nn9L8ly4%3D&amp;amp;se=2026-09-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=lmLdnRilbXhZqHb56xMSTg==" style="max-height: 142px;max-width: 254px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri;font-size:14.6667px;margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0;"&gt;Welcome to the Xilinx Wiki!&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0;"&gt;The purpose of the wiki is to provide you with the tools you need to complete projects and tasks which use Xilinx products.&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview&lt;/a&gt;&lt;/p&gt;
&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0;"&gt;&lt;span style="text-decoration:underline;"&gt;Vivado Tools:&lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Xilinx Tool Downloads:&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/download" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/download&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Vivado Design Suite Tutorial - Design Flows Overview&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug888-vivado-design-flows-overview-tutorial.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug888-vivado-design-flows-overview-tutorial.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Vivado Design Suite Tutorial - Embedded Processor Hardware Design&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug940-vivado-tutorial-embedded-design.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug940-vivado-tutorial-embedded-design.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Vitis&amp;nbsp; Embedded Software Development Flow Documentation&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/hly1569525384514.html" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/hly1569525384514.html&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;text-decoration:underline;"&gt;Community Resources:&lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Xilinx Community Portal:&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/community.html" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/community.html&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Xilinx Community Forums:&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://forums.xilinx.com/" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://forums.xilinx.com/&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Xilinx YouTube&lt;br /&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.youtube.com/user/XilinxInc" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.youtube.com/user/XilinxInc&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;The MicroZed Chronicles by Adam Taylor:&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.adiuvoengineering.com/microzed-chronicles-archive" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.adiuvoengineering.com/microzed-chronicles-archive&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="http://hackster.io/" rel="noopener noreferrer" target="_blank"&gt;Hackster.io&lt;/a&gt; &amp;ndash; Xilinx Page&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.hackster.io/xilinx" rel="noopener noreferrer" target="_blank"&gt;https://www.hackster.io/xilinx&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;text-decoration:underline;"&gt;Processor Solutions &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;MicroBlaze &amp;ndash; Free, 32-bit soft-core CPU&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/products/design-tools/microblaze.html" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/products/design-tools/microblaze.html&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt;MicroBlaze Quick Start Guide: &lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/quick_start/microblaze-quick-start-guide-with-vitis.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/quick_start/microblaze-quick-start-guide-with-vitis.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Arm Cortex-M on Xilinx:&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.arm.com/resources/designstart/designstart-fpga" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.arm.com/resources/designstart/designstart-fpga&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Zynq-7000 SoC: Embedded Design Tutorial: A Hands-On Guide to Effective Embedded System Design&lt;br /&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1165-zynq-embedded-design-tutorial.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1165-zynq-embedded-design-tutorial.pdf&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Zynq UltraScale+ MPSoC: Embedded Design Tutorial: A Hands-On Guide to Effective Embedded System Design&lt;br /&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1209-embedded-design-tutorial.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1209-embedded-design-tutorial.pdf&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;
&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="color:#000000;font-family:Calibri, sans-serif;font-size:11pt;margin:0 0 0 0.5in;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;
&lt;ul&gt;
&lt;li&gt;Versal ACAP Design Guide&lt;br /&gt;&lt;a class="jive-link-external-small" style="color:blue;" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1273-versal-acap-design.pdf" rel="nofollow ugc noopener noreferrer" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1273-versal-acap-design.pdf&lt;/a&gt;&lt;/li&gt;
&lt;/ul&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;
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