What You May Not Know About Jitter Cleaners and Determinism

rscasny — Wed, 06 Oct 2021 21:39:06 GMT

Current Revision posted to Documents by rscasny on 10/6/2021 9:39:06 PM

Yesterday on element14, we held a webinar on clocking ICs: What You Need to Know About Clock Generators, Buffers, and RF Synthesizers

I think on the community, this topic isn't talked about a lot, but there is a lot going on in this area, a lot of innovation that was clearly presented in this informative webinar.

Two of our members had some post-webinar comments/insights:

#1 "I was not aware of anyone using both digital and analog phase locked loop circuits to combat clock jitter, so I learned some good ideas."

#2 "Very interesting indeed with the new range of devices."

The webinar covered clock generators, buffers and RF synthesizers.

The section on clock jitter cleaners was truly fascinating. Now, in general, jitter cleaners can produce at least one output frequency that is locked to the input clock and has lower jitter. Without going into all the details -- go watch the video instead -- jitter cleaners improve overall system performance.

Another section of the webinar that I really thought illuminating was on how timing circuits achieve deterministic latency, that is, remove randomness out of the system. Needless to say this is critical for data conversion applications.

Are you current on what is going on in the area of clocking or timing? If not, watch the webinar here.

element14 webinars are designed to provide you the newest information about electronics today. Attending the live webinar has one added benefit: you can ask the presenter questions. And for this webinar, you had an expert in this area: He holds three patents in the field of microwave circuits and surface acoustic wave filter and has more patents on pulse width modulation and various digital circuits.

Don't miss out. Attend a live Webinar.

Randall Scasny

element14 Webinar Host

Tags: scasny_web