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<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/"><channel><title>Summer of FPGA: Getting Started with FPGAs: Panelist Resources</title><link>https://community.element14.com/learn/events/w/documents/5395/summer-of-fpga-getting-started-with-fpgas-panelist-resources</link><description /><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>Summer of FPGA: Getting Started with FPGAs: Panelist Resources</title><link>https://community.element14.com/learn/events/w/documents/5395/summer-of-fpga-getting-started-with-fpgas-panelist-resources</link><pubDate>Thu, 22 Jul 2021 15:06:14 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:c47c3247-f025-4f37-a18e-55fb1332e520</guid><dc:creator>tariq.ahmad</dc:creator><comments>https://community.element14.com/learn/events/w/documents/5395/summer-of-fpga-getting-started-with-fpgas-panelist-resources#comments</comments><description>Current Revision posted to Documents by tariq.ahmad on 7/22/2021 3:06:14 PM&lt;br /&gt;
&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="text-decoration:underline;"&gt;&lt;strong&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/200x200/__key/communityserver-wikis-components-files/00-00-00-01-48/6523.contentimage_5F00_209366.png"&gt;&lt;img alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/6523.contentimage_209366.png-200x200.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=tEDLYsp5bAaHycyDXOX2zv%2FPGQIoDMEUS89BdAYP7Wk%3D&amp;amp;se=2026-08-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=snms71tdPaNtsDalHMtICA==" style="max-height: 200px;max-width: 200px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="font-family:Calibri;"&gt;Lattice Product Portfolio:&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="color:#0563c1;text-decoration:underline;font-family:Calibri;"&gt;&lt;a class="jive-link-external-small" href="https://www.latticesemi.com/en/Products" rel="nofollow ugc noopener" target="_blank"&gt;https://www.latticesemi.com/en/Products&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="font-family:Calibri;"&gt;Lattice Development Tools: &lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="color:#0563c1;text-decoration:underline;font-family:Calibri;"&gt;&lt;a class="" href="https://www.latticesemi.com/en/Products#_58F82ED81585418A93A8EE6349B10899"&gt;https://www.latticesemi.com/en/Products#_58F82ED81585418A93A8EE6349B10899&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="font-family:Calibri;"&gt;LEC2, Lattice Training Partner: &lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="font-family:Calibri;"&gt;&lt;a class="jive-link-external-small" href="https://lec2-fpga.com/" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://lec2-fpga.com/&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/208x138/__key/communityserver-wikis-components-files/00-00-00-01-48/0755.contentimage_5F00_209367.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/0755.contentimage_209367.png-208x138.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=GI0mF9y1ZKAj348iHGQC%2FbRjtnYc9zYTQD0QQeOtmsE%3D&amp;amp;se=2026-08-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=htMQojM/itYAKohUYesZRg==" style="max-height: 138px;max-width: 208px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;PolarFire SoC: Building a Linux Yocto Image and Controlling the MSS GPIOs&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://youtube.com/playlist?list=PL9B4edd-p2agS6QkXUZjAvjlPiyAO5RP0" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://youtube.com/playlist?list=PL9B4edd-p2agS6QkXUZjAvjlPiyAO5RP0&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;PolarFire SoC Icicle Kit:&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="font-family:Calibri;"&gt;&lt;a class="jive-link-external-small" href="https://youtube.com/playlist?list=PL9B4edd-p2ajvXj0ZflizZI4zgm3Jev_O" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;font-family:Calibri;"&gt;https://youtube.com/playlist?list=PL9B4edd-p2ajvXj0ZflizZI4zgm3Jev_O&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;PolarFire SoC Bare Metal Applications from from Loosely Integrated Memory (LIM)&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://youtube.com/playlist?list=PL9B4edd-p2ahGOmnvJvFLvSID3N3-rJC6" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://youtube.com/playlist?list=PL9B4edd-p2ahGOmnvJvFLvSID3N3-rJC6&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;PolarFire SoC Github&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://github.com/polarfire-soc" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://github.com/polarfire-soc&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span 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style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="font-family:Calibri;"&gt;&lt;a class="jive-link-external-small" href="https://www.microsemi.com/product-directory/fpgas-socs-training/4339-fpga-training-tutorials" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;font-family:Calibri;"&gt;https://www.microsemi.com/product-directory/fpgas-socs-training/4339-fpga-training-tutorials&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-bottom:8pt;"&gt;&lt;span style="color:#333333;"&gt;SmartDebug: Probing your design without re-synthesis or re-implementation and hardware-based single-step debug&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span 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style="color:#0563c1;text-decoration:underline;"&gt;https://www.microsemi.com/product-directory/fpga-design-tools/5590-hls&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;SmartHLS Tutorial (Sobel Filtering for Image Edge Detection)&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="font-family:Calibri;"&gt;&lt;a class="jive-link-external-small" href="https://www.microsemi.com/document-portal/doc_download/1245532-legup-hls-tutorial" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;font-family:Calibri;"&gt;https://www.microsemi.com/document-portal/doc_download/1245532-legup-hls-tutorial&lt;/span&gt;&lt;/a&gt;&lt;span style="color:#333333;font-family:Calibri;"&gt; &lt;br /&gt;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;Microchip Machine Learning Framework: VectorBlox &lt;br /&gt;&lt;a class="jive-link-external-small" href="https://www.microsemi.com/product-directory/dev-tools/5597-vectorblox-ai" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://www.microsemi.com/product-directory/dev-tools/5597-vectorblox-ai&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;Introduction to Microchip VectorBlox Accelerator&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://youtu.be/a4-YiZ05QGU" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://youtu.be/a4-YiZ05QGU&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;Microchip VectorBlox Github repository&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://github.com/Microchip-Vectorblox/VectorBlox-SDK" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://github.com/Microchip-Vectorblox/VectorBlox-SDK&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-top:3pt;margin-bottom:3pt;"&gt;&lt;span style="color:#333333;"&gt;VectorBlox Video Kit Demo Guide&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://download-soc.microsemi.com/FPGA/outgoing/VectorBlox/VectorBlox_Launch_Collateral_v1.0/Demo+Guide.pdf" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://download-soc.microsemi.com/FPGA/outgoing/VectorBlox/VectorBlox_Launch_Collateral_v1.0/Demo+Guide.pdf&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-bottom:8pt;"&gt;&lt;span style="color:#333333;"&gt;Microchip Low Power FPGAs&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/low-power-fpgas" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;"&gt;https://www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/low-power-fpgas&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;margin-bottom:8pt;"&gt;&lt;span style="color:#333333;"&gt;Microchip University, Technical training courses on embedded control&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span style="font-family:Calibri;"&gt;&lt;a class="jive-link-external-small" href="https://secure.microchip.com/mu" rel="nofollow ugc noopener" target="_blank"&gt;&lt;span style="color:#0563c1;text-decoration:underline;font-family:Calibri;"&gt;https://secure.microchip.com/mu&lt;/span&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/254x142/__key/communityserver-wikis-components-files/00-00-00-01-48/0250.contentimage_5F00_209368.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/48/0250.contentimage_209368.png-254x142.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=8iKu6FfxazA36dcjdlftqegDnimsdmU%2B%2FipELLPB3gI%3D&amp;amp;se=2026-08-22T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=lmLdnRilbXhZqHb56xMSTg==" style="max-height: 142px;max-width: 254px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;color:#000000;font-family:Calibri;font-size:14.6667px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;Welcome to the Xilinx Wiki!&lt;/p&gt;&lt;p style="margin:0;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;The purpose of the wiki is to provide you with the tools you need to complete projects and tasks which use Xilinx products.&lt;/p&gt;&lt;p style="margin:0;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://xilinx-wiki.atlassian.net/wiki/spaces/A/overview&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;span style="text-decoration:underline;"&gt;Vivado Tools:&lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Xilinx Tool Downloads:&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://www.xilinx.com/download" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/download&lt;/a&gt;&lt;/span&gt;&lt;span style="font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Vivado Design Suite Tutorial - Design Flows Overview&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug888-vivado-design-flows-overview-tutorial.pdf" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug888-vivado-design-flows-overview-tutorial.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Vivado Design Suite Tutorial - Embedded Processor Hardware Design&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug940-vivado-tutorial-embedded-design.pdf" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug940-vivado-tutorial-embedded-design.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Vitis&amp;nbsp; Embedded Software Development Flow Documentation&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/hly1569525384514.html" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/html_docs/xilinx2021_1/vitis_doc/hly1569525384514.html&lt;/a&gt;&lt;/span&gt;&lt;span style="font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;span style="color:#000000;text-decoration:underline;font-size:11pt;font-family:Calibri, sans-serif;"&gt;Community Resources:&lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Xilinx Community Portal:&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://www.xilinx.com/community.html" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/community.html&lt;/a&gt;&lt;/span&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Xilinx Community Forums:&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://forums.xilinx.com/" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://forums.xilinx.com/&lt;/a&gt;&lt;/span&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Xilinx YouTube&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://www.youtube.com/user/XilinxInc" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.youtube.com/user/XilinxInc&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;The MicroZed Chronicles by Adam Taylor:&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://www.adiuvoengineering.com/microzed-chronicles-archive" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.adiuvoengineering.com/microzed-chronicles-archive&lt;/a&gt;&lt;/span&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;a class="jive-link-external-small" href="http://hackster.io/" style="color:blue;" target="_blank"&gt;Hackster.io&lt;/a&gt; – Xilinx Page&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;&lt;a class="jive-link-external-small" href="https://www.hackster.io/xilinx" style="color:blue;" target="_blank"&gt;https://www.hackster.io/xilinx&lt;/a&gt;&lt;/span&gt;&lt;span style="font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;span style="font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;span style="color:#000000;text-decoration:underline;font-size:11pt;font-family:Calibri, sans-serif;"&gt;Processor Solutions &lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;MicroBlaze – Free, 32-bit soft-core CPU&lt;a class="jive-link-external-small" href="https://www.xilinx.com/products/design-tools/microblaze.html" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/products/design-tools/microblaze.html&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt;MicroBlaze Quick Start Guide: &lt;a class="jive-link-external-small" href="https://www.xilinx.com/support/documentation/quick_start/microblaze-quick-start-guide-with-vitis.pdf" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/support/documentation/quick_start/microblaze-quick-start-guide-with-vitis.pdf&lt;/a&gt;&lt;/span&gt;&lt;span style="font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Arm Cortex-M on Xilinx:&lt;a class="jive-link-external-small" href="https://www.arm.com/resources/designstart/designstart-fpga" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.arm.com/resources/designstart/designstart-fpga&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Zynq-7000 SoC: Embedded Design Tutorial: A Hands-On Guide to Effective Embedded System Design&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1165-zynq-embedded-design-tutorial.pdf" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1165-zynq-embedded-design-tutorial.pdf&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Zynq UltraScale+ MPSoC: Embedded Design Tutorial: A Hands-On Guide to Effective Embedded System Design&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1209-embedded-design-tutorial.pdf" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1209-embedded-design-tutorial.pdf&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&lt;span style="margin:0 0 0 0.5in;font-size:11pt;font-family:Calibri, sans-serif;color:#000000;"&gt; &lt;/span&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;Versal ACAP Design Guide&lt;br /&gt;&lt;a class="jive-link-external-small" href="https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1273-versal-acap-design.pdf" rel="nofollow ugc noopener" style="color:blue;" target="_blank"&gt;https://www.xilinx.com/support/documentation/sw_manuals/xilinx2020_2/ug1273-versal-acap-design.pdf&lt;/a&gt;&lt;/li&gt;&lt;/ul&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;

&lt;div style="font-size: 90%;"&gt;Tags: webinar_update&lt;/div&gt;
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