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<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/"><channel><title>Designing an Intelligent Edge Processing Architecture with a CPU, GPU or Heterogeneous SoC?</title><link>https://community.element14.com/learn/learning-center/the-tech-connection/w/documents/4138/designing-an-intelligent-edge-processing-architecture-with-a-cpu-gpu-or-heterogeneous-soc</link><description /><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>Designing an Intelligent Edge Processing Architecture with a CPU, GPU or Heterogeneous SoC?</title><link>https://community.element14.com/learn/learning-center/the-tech-connection/w/documents/4138/designing-an-intelligent-edge-processing-architecture-with-a-cpu-gpu-or-heterogeneous-soc</link><pubDate>Mon, 11 Oct 2021 19:52:05 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:c6c11024-e16a-4617-9a79-9e18990af013</guid><dc:creator>rscasny</dc:creator><comments>https://community.element14.com/learn/learning-center/the-tech-connection/w/documents/4138/designing-an-intelligent-edge-processing-architecture-with-a-cpu-gpu-or-heterogeneous-soc#comments</comments><description>Current Revision posted to Documents by rscasny on 10/11/2021 7:52:05 PM&lt;br /&gt;
&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;A hot topic right now is intelligent processing at the edge, called so because data is stored and processed locally and closest to the edge of a network.&amp;nbsp; Typically, this intelligent processing implements complex functions such as artificial intelligence, machine learning, data analytics and decision making. Applications that rely upon edge-based intelligence include Autonomous Vehicles, Vison-Guided Drones &amp;amp; Robotics, and Industry 4.0 (or Industrial IoT).&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/256x88/__key/communityserver-wikis-components-files/00-00-00-03-89/contentimage_5F00_214463.png"&gt;&lt;img alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/03/89/contentimage_214463.png-256x88.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=WFTMtxh%2B8vWDPByvCGsUJyQnY2upxbTn6vGpHXE%2BKpA%3D&amp;amp;se=2026-05-27T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=qSNkkYtj1lEuFUSSpYud8g==" style="max-height: 88px;max-width: 256px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;For these applications, edge processing is required due to the required response / processing time. For example, it isn’t safe for an autonomous vehicle to rely on cloud-based processing for maneuvering decisions due to the latency involved.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;But it’s not just the latency developers must consider when deciding whether to implement edge processing. They need also consider network availability. Network connections may not always be available due to network coverage, outages, weather or natural features, and urban environments blocking the signal.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;strong&gt;Challenges of Edge Processing&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;Of course, processing at the edge brings with it challenges for the developer such as:&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Performance&lt;/em&gt; – High performance algorithms are required to be implemented, often with a hard, real-time performance target. This places significant demands on the chosen processing solution. &lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Power efficiency&lt;/em&gt; – Edge solutions are often required to achieve high-performance within a constrained power budget. &lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Safety &amp;amp; Security&lt;/em&gt; – Edge solutions are often deployed remotely where access to them is not strictly limited to authorized personnel only. As such, the system developer must ensure any data and intellectual property stored within the system remains secure and that it cannot be modified by unauthorized personnel due to the potential safety implications.&lt;/span&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;strong&gt;Achieving High Performance&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;To meet the processing demands required by the application we must select a high-performance multi-core processing system such as, GPU, CPU or DSP. Often to aid in achieving performance requirements, either in throughput or real-time response, the multicore processor is combined with an external FPGA or ASIC connected using a high-speed interface such as peripheral component interconnect express (PCIe).&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;strong&gt;Gaining Power Efficiency &lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;Creating a power efficient solution requires the implementation of architectures which supports several operating modes, enabling the power constraints to be achieved.&amp;nbsp; While power modes depend upon the application, the typically observed modes at the edge are: &lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Active Power Mode&lt;/em&gt; – Full operation is being undertaken, for example, an autonomous vehicle navigating in its environment.&amp;nbsp; &lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Low Power / Reduced Processing Mode&lt;/em&gt; – Application is performing reduced processing. &lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Sleep Mode&lt;/em&gt; – The lowest power mode, with no processing occurring. The processor must be woken from this mode for processing to continue.&lt;/span&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;Component selection will also play a crucial element in achieving the power budget. Of course, the processing requirements will drive the selection of the processor. However, a close second consideration should be the power efficiency. To help us select the most efficient processing solution several metrics exist. Two of the most common are Floating Point Operations per Watt (FLOPS/Watt) or Millions of Instructions Per Second per Watt (MIPS/Watt).&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;strong&gt;What about Security?&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;Due to their remote deployment and the consequent inability to strictly control access, the safety and security of&amp;nbsp; edge-based deployments is critical. In an edge-based deployment, a security breach could have a wide impact, ranging from reputational damage to legal and regulatory repercussions.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;To protect against malicious attackers, the system should be subjected to a threat analysis during its design phase. This threat analysis is performed early in the design cycle, prior to starting the detailed design, to ensure the necessary security features can be implemented to secure the system.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;This threat analysis will consider different elements of the design, its data sensitivity, and the different methods in which the system can be attacked. As such, the threat analysis will consider elements including:&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Application&lt;/em&gt; – Is the application mission or life critical? What is the end effect if the device security is compromised?&lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Data&lt;/em&gt; – How critical is the information stored within the system? &lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Deployment&lt;/em&gt; – Is the system remotely deployed or used within a semi-controlled environment?&lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;Access – Both physical and remote. Does the system allow access remotely for control, maintenance, or updates? If so, how does the application verify the access is authorized?&lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Communication Interfaces&lt;/em&gt; – Is information transmitted to or from the system critical? Should the application be concerned about eavesdroppers snooping? Does the equipment need to be able to protect against advanced attacks, for example, reply attacks?&lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Reverse Engineering&lt;/em&gt; – Does the embedded system contain Intellectual Property (IP) or other sensitive design techniques which must be protected?&lt;/span&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;The results of this threat analysis are used by the engineering design team to implement strategies within the design which address these identified threats. At a high level, addressing the identified threats can be categorized into one of the following approaches:&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Information Assurance&lt;/em&gt; – Ensuring information stored within the system and its communications are secure. This also needs to address identity assurance which ensures access to the unit is from a trusted source. For example, when communicating and controlling its operation or updating application software in the field.&lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;&lt;em&gt;Anti-Tamper&lt;/em&gt; – Ensuring the system can protect itself from external attacks to access the system and its contents.&lt;/span&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;strong&gt;Advantages of Using a Heterogeneous SoC&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;One solution which can address the performance, power, and security requirements is the use of a heterogeneous System on Chip such as &lt;a class="jive-link-wiki-small" href="/products/manufacturers/xilinx/m/files/1262"&gt;Xilinx Zynq SoCs&lt;/a&gt; or &lt;a class="jive-link-wiki-small" href="/products/manufacturers/xilinx/m/files/1263"&gt;Zynq UltraScale+ MPSoCs&lt;/a&gt;, which combine processors with programmable logic. Often these devices will contain both application and real-time processors along with the programmable logic (See Figure 1).&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;This tight coupling of logic and processors allows for the creation of a system which is more responsive, reconfigurable, and power efficient. A Traditional CPU / GPU based approach requires the use of external memory from one stage of algorithm to the next. This reduces determinism and increases both power dissipation and latency.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/829x214/__key/communityserver-wikis-components-files/00-00-00-03-89/contentimage_5F00_214464.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/03/89/contentimage_214464.png-829x214.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=Frgr8wsSY1SOBJgLpyznvnLR1mFTiRg7GZZBd8cO2BY%3D&amp;amp;se=2026-05-27T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=qzy0CUyGRysB/ppcsE8Kdw==" style="max-height: 214px;max-width: 829px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;Using a Heterogeneous SoC enables a deterministic response time with a reduced latency. The programmable logic also offers a very efficient implementation, when considering the MIPS/Watt.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;Heterogeneous SoCs also provide complex internal power architectures and frameworks that allow the powering down of processors and peripherals within the SoC.&amp;nbsp; Many heterogeneous SoCs also use power management software frameworks which are compliant with the IEEE P2415 Standard for Unified Hardware Abstraction and Layer for Energy Proportional Electronic Systems.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;Heterogeneous SoCs also provide many features which enable a secure design from the use of secure configuration, which includes AES Encryption, RSA and SHA signatures to prevent reverse engineering or tampering with the bit stream, to the use of internal mixed signal converters used to monitor device temperature and supply voltages to prevent external tamper events.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;When it comes to executing software, Trust Zone technology and Virtualization can be used to create Orthogonal software worlds, which ensure that higher privilege software (SW) and logic peripherals cannot be accessed by SW applications running with a lower access privilege.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;In short, heterogeneous SoCs are capable of providing the performance, power efficiency, and security required for many edge applications.&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;strong&gt;What Alternatives Exist to Edge Processing?&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;While edge processing is necessary for many applications not all processing needs intelligence at the edge. Alternatives to edge processing include:&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;ul&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;Cloud Processing – In cloud processing, the data is transferred back from the edge for processing. Cloud processing applications have a longer response time than edge processing applications (See Figure 2). Example applications include Voice Controlled Home Automation where delays in response acceptable. &lt;/span&gt;&lt;/li&gt;&lt;li&gt;&lt;span style="font-size:12pt;"&gt;Fog Processing – In Fog processing, the process node is located closer to the edge node which is gathering the data, typically the processing node is located on a Local Area Network (LAN). One example application would be an Industry 4.0 manufacturing solution which processes manufacturing test results. &lt;/span&gt;&lt;/li&gt;&lt;/ul&gt;&lt;p style="margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/579x261/__key/communityserver-wikis-components-files/00-00-00-03-89/contentimage_5F00_214465.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/03/89/contentimage_214465.png-579x261.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=SDo3LLDPbVw%2Fp5dU10sVLje%2BBMQZz5ubInhmRfxXrr4%3D&amp;amp;se=2026-05-27T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=zVgqvGRyyhiQsE+N38vThA==" style="max-height: 261px;max-width: 579px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;&lt;strong&gt;Conclusions&lt;/strong&gt;&lt;/span&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;span style="font-size:12pt;"&gt;Intelligent processing at the edge of a network presents several challenges to the system developer, including performance, power, and security. There are several considerations that developers need to make for performance, power efficiency, and especially for security. However, Heterogeneous SoCs provide the ability to address all these challenges. &lt;/span&gt;&lt;/p&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;

&lt;div style="font-size: 90%;"&gt;Tags: fpga_featured, soc, edge computing, tech spotlight, system on chip, xilinx, fpga, iot_design, cloud, fpga_spot, gpu, cpu, edge processing&lt;/div&gt;
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