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<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/"><channel><title>Semiconductor manufacturers 'to tackle chip production problems'</title><link>https://community.element14.com/learn/publications/w/documents/6128/semiconductor-manufacturers-to-tackle-chip-production-problems</link><description /><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>Semiconductor manufacturers 'to tackle chip production problems'</title><link>https://community.element14.com/learn/publications/w/documents/6128/semiconductor-manufacturers-to-tackle-chip-production-problems</link><pubDate>Thu, 07 Oct 2021 01:20:13 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:569a9554-64db-456c-9865-b6d038f27580</guid><dc:creator>e14news</dc:creator><comments>https://community.element14.com/learn/publications/w/documents/6128/semiconductor-manufacturers-to-tackle-chip-production-problems#comments</comments><description>Current Revision posted to Documents by e14news on 10/7/2021 1:20:13 AM&lt;br /&gt;
&lt;span&gt;Three major European semiconductor manufacturers have formed an alliance to tackle some of the problems facing the silicon chip industry.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Infineon, NXP Semiconductors and STMicroelectronics met to discuss issues such as circuit detail resolutions falling to 65 and 45 mm &amp;amp;#150; which is becoming increasingly common.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Although chip designs often pass traditional checks, when they are manufactured in silicon these hurdles defeat them.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Teams are then forced to implement expensive repair methods or discard the chip altogether. &lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;This also means that designers can be forced to compromise on performance levels because of physical weakness in the production or design verification stages.&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;Project leader Philippe Garcin, from STMicroelectronics, said: &amp;amp;quot;Our most important target was to favour &amp;#39;first silicon success&amp;#39; without affecting the performance of the circuits.&amp;amp;quot;&lt;/span&gt;&lt;br /&gt;&lt;br /&gt;&lt;span&gt;In related news, Lattice Semiconductor Corporation and Beyond Semiconductor recently announced an alliance to develop complier tools for the former&amp;#39;s soft processors.&lt;/span&gt;&lt;a href="http://feeds.directnews.co.uk/feedtrack/justcopyright.gif?feedid=1785&amp;amp;itemid=19459573"&gt;&lt;img alt="ADNFCR-1785-ID-19459573-ADNFCR" src="http://feeds.directnews.co.uk/feedtrack/justcopyright.gif?feedid=1785&amp;amp;itemid=19459573" /&gt;&lt;/a&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;
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