Semiconductor Research Corporation unveils transistor

e14news — Thu, 07 Oct 2021 01:45:20 GMT

Current Revision posted to Documents by e14news on 10/7/2021 1:45:20 AM
The Semiconductor Research Corporation has unveiled the first top-gated field effect transistor (FET) and CMOS inverters to feature 20 nm contact holes, with the aid of diblock copolymer lithography.

Alongside scientists from Stanford University and Taiwan Semiconductor Manufacturing Company, the research consortium developed the tiny product which can be used on a full wafer scale for sub-22 nm CMOS technologies.

HS Philip Wong, professor of electrical engineering at Stanford, predicted that the item could have a significant impact on advancements in electronics in the future.

He explained: "We believe this development will help to bring self-assembly closer to broad application in the semiconductor industry and will help increase the use of nanotechnology."

The significance of the technology is that semiconductors could potentially be manufactured using techniques other than conventional lithography methods, potentially leading to cheaper, smaller and faster products.

Recently, Fairchild Semiconductors released a new portfolio of pulse-width modulated controllers, which can help designers achieve energy-savings in electronic devices.