<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>OrangeCrab - improved reset block: How to use one single user button to do multiple tasks in an FPGA</title><link>/members-area/personalblogs/b/blog/posts/orangecrab---improved-reset-block-how-to-use-one-single-user-button-to-do-multiple-tasks-in-an-fpga</link><description>The OrangeCrab Verilog example has an orangecrab_reset block that uses the user button to go into boot mode (DFU). Although I found it practical so you do not have to unplug and plug the board while pressing the user button-down, sometimes it is good</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator></channel></rss>