RE: Zynq: Custom IP IRQ

Jonathan101 — Wed, 01 Nov 2023 16:43:18 GMT

Does the procedure you described is viable for Ultrascale+ ?

I've noticed that I don't see the interrupt identifier on xparameters.h.

RE: Zynq: Custom IP IRQ

dhmarinov — Thu, 25 Mar 2021 12:36:40 GMT

Hi Victor,

The code looks fine, but the problem may be in the hardware - did you make sure that the interrupt source is maked as suck i.e. when packaging the IP you have to indicate that the interrup is such a signal.

You can find out whether that has been done correctly if you find the interrup in the xparameters.h.

RE: Zynq: Custom IP IRQ

vricardoas — Wed, 24 Mar 2021 17:03:39 GMT

Dear Dimitar,

I highly appreciate your post, it is very informative.

It is been a while that I have a similar problem, and I still have it!!

I tried what you said on your post, however it did not worked for me.

I have made a Custom IP and I want to use the interrupt services, but I am not able to generate any interrupt from my Custom IP. At this point I am not sure if the problem is related with the SW or with the HW vhdl Template.

I include my code, so if you have a chance, please check it and tell me if you found my mistake.

Thank you very much in advance,

Kind Regards,

Victor.

#include <stdio.h>

#include <stdlib.h>

#include <unistd.h>

#include "xil_printf.h"

//#include "./LFSR_HY_v1_0/src/LFSR_HY.h"

#include "LFSR_HY_INT_Driver.h"

#include "xparameters.h"

/***********For interruption***********/

#include "xscugic.h"

#include "xil_exception.h"

/***********DEFINES***********/

//LFSR

#define LFSR_HY_INT_BASE_ADDR XPAR_LFSR_HY_INT_0_S00_AXI_BASEADDR

#define S_Freq_Div_Select LFSR_HY_INT_S00_AXI_SLV_REG0_OFFSET

#define S_UpDown LFSR_HY_INT_S00_AXI_SLV_REG1_OFFSET

#define S_trig LFSR_HY_INT_S00_AXI_SLV_REG2_OFFSET

#define S_seq LFSR_HY_INT_S00_AXI_SLV_REG3_OFFSET

#define S_registro LFSR_HY_INT_S00_AXI_SLV_REG4_OFFSET

#define S_Clk_seq LFSR_HY_INT_S00_AXI_SLV_REG5_OFFSET

#define LFSR_HY_INT_DEVICE_ID XPAR_LFSR_HY_INT_0_DEVICE_ID

#define LFSR_HY_INT_INTERRUPT_ID XPAR_FABRIC_LFSR_HY_INT_0_IRQ_INTR

//SCUGIC

#define INTC_DEVICE_ID XPAR_PS7_SCUGIC_0_DEVICE_ID

//---------------------Structure declarations-----------------------------//

XScuGic INTC_inst; //An instance of global interrupt controller

LFSR_HY_INT LFSR_HY_INT_inst; //An instance of our custom IP

//-----------------------Prototype functions------------------------------//

void LFSR_HY_INT_Handler(void *CallbackRef);

void XScuGicSetup();

//------------------------Interrupt Handler-------------------------------//

void LFSR_HY_INT_Handler(void *CallbackRef){

xil_printf("\r\n Interrupt Handler");

//Disable the interrupt

LFSR_HY_INT_DisableInterrupt(&LFSR_HY_INT_inst, 0x1);

xil_printf("\r\n Interrupt Disable");

//ACK the interrupt

LFSR_HY_INT_ACKInterrupt(&LFSR_HY_INT_inst, 0x1);

xil_printf("\r\n ACK Interrupt");

//Enable the interrupt

LFSR_HY_INT_EnableInterrupt(&LFSR_HY_INT_inst, 0x1);

xil_printf("\r\n Interrupt Enable");

}

//------------------------Interrupt Controller Setup-------------------------------//

void XScuGicSetup(){

/* Initialize the interrupt controller driver so that it is ready to use.*/

static XScuGic_Config * IntcConfig;

IntcConfig = XScuGic_LookupConfig(INTC_DEVICE_ID);

XScuGic_CfgInitialize(&INTC_inst, IntcConfig, IntcConfig->CpuBaseAddress);

//Enable our custom interrupt

LFSR_HY_INT_EnableInterrupt(&LFSR_HY_INT_inst, 0x1);

LFSR_HY_INT_GlobalEnableInterrupt(&LFSR_HY_INT_inst, 0x1);

* Connect the interrupt controller interrupt handler to the hardware

* interrupt handling logic in the ARM processor.

Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,

(Xil_ExceptionHandler)XScuGic_InterruptHandler,

(void*)&INTC_inst);

Xil_ExceptionEnable(); //Enable interrupts in the ARM

* Connect a device driver handler that will be called when an

* interrupt for the device occurs, the device driver handler performs

* the specific interrupt processing for the device

XScuGic_Connect(&INTC_inst,

LFSR_HY_INT_INTERRUPT_ID,

(Xil_ExceptionHandler)LFSR_HY_INT_Handler, //Xil_InterruptHandler

0);

//Enable our custom interrupt AGAIN...

LFSR_HY_INT_EnableInterrupt(&LFSR_HY_INT_inst, 0x1);

LFSR_HY_INT_GlobalEnableInterrupt(&LFSR_HY_INT_inst, 0x1);

//Enable Global Interrupt Controller

XScuGic_Enable(&INTC_inst, LFSR_HY_INT_INTERRUPT_ID);

xil_printf("\r\n Interrupt Ready To Go!!");

}

int main()

{

/* LFSR driver initialization */

//LFSR_HY_INT_Reg_SelfTest((void *) LFSR_HY_INT_BASE_ADDR); //checks the read/write registers

LFSR_HY_INT_mWriteReg(LFSR_HY_INT_BASE_ADDR, S_Freq_Div_Select, 0);

LFSR_HY_INT_mWriteReg(LFSR_HY_INT_BASE_ADDR, S_UpDown, 0);

u32 reloj = 0;

u32 trigger = 0;

u32 sequence = 0;

u32 registro = 0;

xil_printf("Serial Connection started.\n\r");

LFSR_HY_INT_Init(&LFSR_HY_INT_inst, LFSR_HY_INT_BASE_ADDR);

XScuGicSetup();

while(1){

}

return 0;

}