<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>PYNQ Z2: Getting Up and Running - Tea Storm</title><link>/members-area/personalblogs/b/blog/posts/pynq-z2-getting-up-and-running---tea-storm</link><description>Tea Storm 


 Get up! 


 Concepts 

 AXI and AXI Interconnect 


 HLS 


 Overlays 



 Get Running! 


 Fun part 

 Create your own Test Pattern Generator 


 Get it out over HDMI Output 

 Tip 



 Of course you can animate that... 


 Tea Storm, I</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: PYNQ Z2: Getting Up and Running - Tea Storm</title><link>https://community.element14.com/members-area/personalblogs/b/blog/posts/pynq-z2-getting-up-and-running---tea-storm</link><pubDate>Fri, 09 Jul 2021 19:39:09 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:66eaa27a-a6ff-4491-a3c8-eb88160087c8</guid><dc:creator>ari_c</dc:creator><slash:comments>1</slash:comments><description>&lt;p&gt;Hi, I am also currently trying to make a Test Pattern Generator. I made the TPG IP in HLS and then with my block design generated, I am currently trying to figure out how to use Vitis to run the functions I made in HLS on my PYNQ-Z2. However, I am noticing that in your tutorial it looks like you are using Jupyter notebooks to load your program your FPGA. Are you able top use Jupyter instead of Vitis to load block designs onto the chip&amp;#39;s hardware?&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=9371&amp;AppID=293&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>