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Avnet Boards General Simple AMP: Bare-Metal System Running on Both Cortex-A9 Processors
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Simple AMP: Bare-Metal System Running on Both Cortex-A9 Processors

Former Member
Former Member over 11 years ago

I would like try to make run two different bare metal application on both cpus of the Zynq 7010.
In order to do this, I tryed to create a new fsbl with the default template in the SDK integrated in Vivado (Release version 2013.4). Then I create the two Helloword application for both core of the Zynq.

In the follow of this message I paste the code of the main procedures:

Cpu0:

#define sev() __asm__("sev")
#define CPU1STARTADR 0xfffffff0
#define COMM_VAL  (*(volatile unsigned long *)(0xFFFF0000))
//void print(char *str);

int main()
{
   // init_platform();
tprint("hello!
r");

    //Disable cache on OCM
    Xil_SetTlbAttributes(0xFFFF0000,0x14de2);           // S=b1 TEX=b100 AP=b11, Domain=b1111, C=b0, B=b0

    COMM_VAL = 0;

    print("CPU0: writing startaddress for cpu1
r");
tXil_Out32(CPU1STARTADR, 0x00200000);
tdmb(); //waits until write has finished
tprint("CPU0: sending the SEV to wake up CPU1
r");
tsev();

tprint("CPU0: Hello World!
r");
tCOMM_VAL = 1;

    return 0;
}


Cpu1:

#define COMM_VAL    (*(volatile unsigned long *)(0xFFFF0000))

int main()
{
    //Disable cache on OCM
tXil_SetTlbAttributes(0xFFFF0000,0x14de2);      // S=b1 TEX=b100 AP=b11, Domain=b1111, C=b0, B=b0
//    init_platform();
//
//    print("Hello World
r");

twhile(COMM_VAL == 0){};
tprint("CPU1: Hello Word!
r");
tCOMM_VAL=0;

    return 0;
}


After, a build of all projects, in order to create the "*.bit" (using the "Xilinx Tools" menus) to be loaded in the sd or flash,  in both cases my project does not works.

Do I have  to change something in the fsbl or in another part of this project?

Thank you so much for your support,
Claudio

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  • Former Member
    0 Former Member over 11 years ago

    Hello Claudio,

     

    Lab 9 of the Avnet Zynq Software Speedway Design course implements a bare metal dual processor example. The Speedway labs are based on Vivado 2013.3 and have both ZedBoard and MicroZed versions. You can ask your local Avnet/Silca FAE for a copy of the material or we will be posting it on this site in the near future.

     

    -Gary

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  • Former Member
    0 Former Member over 11 years ago

    Hello Claudio,

     

    Lab 9 of the Avnet Zynq Software Speedway Design course implements a bare metal dual processor example. The Speedway labs are based on Vivado 2013.3 and have both ZedBoard and MicroZed versions. You can ask your local Avnet/Silca FAE for a copy of the material or we will be posting it on this site in the near future.

     

    -Gary

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  • Former Member
    0 Former Member over 11 years ago in reply to Former Member

    Gary, I got a similar issue and am wondering when are you going to post the lab 9?

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