Memory Interface Generator on XZ7100?

Question

Hi,

We are considering design an accelerator that make use of the Xilinx DDR controller IP so that the PL can access DRAM directly without AXI-DMA; however we just found from the manual that the DDR interface on Zynq MMP is connected to Bank 502, which is only connected to the PS. Is it possible to use the Memory Interface Generator on Zynq MMP XZ7100? Thanks a lot!

Best,

Chang

Former Member · Accepted Answer

The DDR3 on the Zynq MMP uses the PS hard IP memory controller and cannot be used with a PL based MIG design. If you need DDR3 connected to the PL, you may want to take a look at Avnet Zynq Mini-ITX platform www.zedboard.org/product/mini-itx-board .