Avnet Boards Forums

Avnet Boards General DDR behavioral model for MicroZed

Join Avnet Boards Forums to participate - click to join for free!

Actions

Forum Thread Details

Replies 3 replies
Subscribers 358 subscribers
Views 433 views
Users 0 members are here

Related

DDR behavioral model for MicroZed

p.hayk over 6 years ago

Hello Forum,

Hope this is right place to ask.

I bought MicroZed board now want to simulate its DDR model with my developer RTL code.

Can someone please help to get behaviora model, preferably verilog, for DDR memory in MicroZed.

Thanks

Hayk

jafoste4 over 6 years ago

Hi Hayk,

What exactly are you trying to simulate? Are you trying to simulate the DDR on microzed that is located in the PS? Or are you trying to simulate some external DDR in the PL?

-Josh
Cancel
Vote Up 0 Vote Down

Sign in to reply

Cancel
p.hayk over 6 years ago

Thanks for the answer
I am tring to simulate DDR located in PL. Digital simulation with Vivado simulator.

Thanks
Hayk
Cancel
Vote Up 0 Vote Down

Sign in to reply

Cancel
bhfletcher over 6 years ago in reply to p.hayk

I'm still a bit confused as to what you are asking. If you are adding a MIG controller in PL to connect to some DDR3 SDRAM that you have placed on a custom carrier, then I suggest you use the MIG and DDR3 vendor models for your simulation.

This forum response over at Xilinx may be helpful:
https://forums.xilinx.com/t5/Memory-Interfaces/DDR-3-simulation-MIG/td-p/848122

If you are creating some sort of DDR structure inside the PL and not a memory controller to an external memory, then you will have to tell us more about what you are doing.
Bryan
Cancel
Vote Up 0 Vote Down

Sign in to reply

Cancel