You will need to initialize the Processor Subsystem, using either JTAG (ps7_init.tcl) or booting (ps7_init.c), with the files generated by 'exporting' your design to SDK to get a clock generated in the Processor Section for the Programmable Logic section to become active.
The easiest way to setup the clock would be to 'open' or 'customize' the Zynq Processing System block in your Vivado block design, select 'Clock Configuration', and then enable one or more PL Fabric Clocks and set the desired frequency. Then connect the clock output(s) from the PS block to your PL logic.
You might want to take a look at the Zynq SW and HW Speedway material located in the 'Training and Videos' section of the website for presentation and lab material on designing Zynq Systems: http://zedboard.org/support/trainings-and-videos
You will need to initialize the Processor Subsystem, using either JTAG (ps7_init.tcl) or booting (ps7_init.c), with the files generated by 'exporting' your design to SDK to get a clock generated in the Processor Section for the Programmable Logic section to become active.
The easiest way to setup the clock would be to 'open' or 'customize' the Zynq Processing System block in your Vivado block design, select 'Clock Configuration', and then enable one or more PL Fabric Clocks and set the desired frequency. Then connect the clock output(s) from the PS block to your PL logic.
You might want to take a look at the Zynq SW and HW Speedway material located in the 'Training and Videos' section of the website for presentation and lab material on designing Zynq Systems: http://zedboard.org/support/trainings-and-videos
