Using ILA for Debugging PL designs

Hi MZ users,
I could get the Microzed RevC work with Vivado 2014.2 recently released. This is the observation, if I generate a bitfile with just the PS system and program the device through a Digilent HS2 USB2JTAG adapter, the PS7 system boots the Linux which can be seen through the TTermPro console. However, when I try to insert additional logic ( a simple FCLK_CLK0 /2 divider), the PS7 system fails to boot. How would I debug the internal nodes with ILA, First I tried setting up some nets as "Mark Debug" in source wrappers and then inserting the ILA core during synthesis / implementation. However, doesn't look like the PS7 system likes this at all, any additional logic in PL causes the PS7 not to boot! Anyone who has tried this with Micorzed, would appreciate a simple example on how to insert an ILA and debug on Microzed.

Best
Girish

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0 Former Member over 10 years ago

There is an example of using the Vivado Analyzer (ILA) to debug PL logic in the 2013.4 Xilinx Concepts, Tools and Techniques tutorial (section 4.2) that targets the Zedboard found here: http://www.zedboard.org/support/design/1521/11

The Vivado Analyzer should work exactly the same on a design targeting a MicroZed board. I have reviewed an early version of the 2014.2 Concepts Tools and Techniques tutorial and the steps have not changed for 2014.2

There is also an example of using the Vivado Analyzer to debug PL logic in the Avnet Developing Zynq 7000 AP SoC Hardware Speedway Training course that includes labs targeting the MicroZed. The Speedway material was implemented in Vivado 2013.3 but the labs should still be applicable. You can find the Speedway training material here: http://www.zedboard.org/support/trainings-and-videos

-Gary
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0 Former Member over 10 years ago

There is an example of using the Vivado Analyzer (ILA) to debug PL logic in the 2013.4 Xilinx Concepts, Tools and Techniques tutorial (section 4.2) that targets the Zedboard found here: http://www.zedboard.org/support/design/1521/11

The Vivado Analyzer should work exactly the same on a design targeting a MicroZed board. I have reviewed an early version of the 2014.2 Concepts Tools and Techniques tutorial and the steps have not changed for 2014.2

There is also an example of using the Vivado Analyzer to debug PL logic in the Avnet Developing Zynq 7000 AP SoC Hardware Speedway Training course that includes labs targeting the MicroZed. The Speedway material was implemented in Vivado 2013.3 but the labs should still be applicable. You can find the Speedway training material here: http://www.zedboard.org/support/trainings-and-videos

-Gary
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