Problem porting Design from MicroZed to SVDK: Incorrect value 'zynq' specified for property SIM_DEVICE

Hello,

I am trying to port Microzed Phython1300 reference design to SVDK (picoZed). In short I use same Vivado version 2014.3.1, I changed PS preset to match picoZed, changed Zynq from 7020 to 7015, updated the IP to match the new HW and changed HW constrains to match SVDK. My problem is that when performing Synthesis I get the following error:
[Netlist 29-72] Incorrect value 'zynq' specified for property 'SIM_DEVICE'. Expecting type 'string' with possible values of '7SERIES,VIRTEX4,VIRTEX5,VIRTEX6'. The system will either use the default value or the property value will be dropped. Please verify your source files. ["c:/Designs/PYTHON1300_REF_DESIGN/vivado_7015/project_1.srcs/sources_1/ipshared/avnet.com/fmc_imageon_vita_receiver_v1_15_a/d7c3afaa/project_6.srcs/sources_1/imports/fmc_imageon_vita_receiver_v1_15_a/iserdes_clocks.vhd":1204].

Anybody, knows where this could come from?
Thanks in advance.
Ben

0 Former Member over 10 years ago

I realize that I wrote when performing synthesis, actually I got this critical warning when elaborating design (open elaborated design). Thanks
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0 albertabeef over 10 years ago

Benjamin,
We have a new version of the vita/python receiver core, with which I was able to port designs to other Zynq devices.
The new vita/python receiver core has been split into two seperate cores:
- onsemi_vita_spi (contains the SPI controller)
- onsemi_vita_cam (contains the LVDS de-serializer, etc...)
Please use the following tutorial document to download source code and build the Vivado 2014.4 design for one of the supported FMC carriers (ZC702, ZedBoard, MicroZed FMC Carrier Card).
EMBV_PYTHON1300C_Frame_Buffer_Tutorial_2014_4_01.pdf
https://avnet.egnyte.com/dl/y73DZG88WG
You will then be able to port the design to the SVDK by specifying a new Zynq device, and providing new XDC constraints, as you described previously.
Regards,
Mario.
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0 Former Member over 10 years ago

Hello,
Following your advice I donwloaded the file and did the same job again, it solved the above mentionned synthesis problem. I however had another problem using Vivado 2014.4 (I2C not working) and had to update to vivado 2015.2 to solve it. Now the application is executing with no error (HDMI Initialization/PYTHON Initialization/ CFA Initialization
TPG Initialization/VDMA 0 Initialization/VDMA1 Initialization/OSD Initialization (camera=0xFF, tpg=0x00)
System Ready!). However I still have no output on my hdmi screen. Any idea what this could be?
I am looking into DE/Hsync/Vsync ADV7511 pin which are not grounded on SVDK and clock frequencies.
Thanks for your support.
Br,
Ben
but
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0 Former Member over 9 years ago

Can someone point me to where I can get the Vivado board file for the picozed Smart Vision Development Kit? I would like to add a second uart so the board file allow me to get started.
"Smart Vision Development Kit 2015-SVDK-12"
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0 albertabeef over 9 years ago

mamatrvs,
There is no board definition files for the SVDK.
However, you can use the PicoZed board definition files, available on picozed.org, for use with the SVDK.
Regards,
Mario.
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0 albertabeef over 9 years ago

I was just informed that there are no board definition files for the PicoZed SOMs, which makes sense since these SOMs require a carrier.
There is a PicoZed PS Preset (TCL) file, which can be used to configure the Zynq device for the SVDK.
Regards,
Mario..
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