in sdk,when i built a new project ,there is a target hadware processor contains ps7_cotexa9_0 and ps7_cotexa9_1 ,each cotex have some support package ,i bulit a zynq_fsbl_0 and 1 ,there are two independent main()uFF0Cbut cant create one image.
in sdk,when i built a new project ,there is a target hadware processor contains ps7_cotexa9_0 and ps7_cotexa9_1 ,each cotex have some support package ,i bulit a zynq_fsbl_0 and 1 ,there are two independent main()uFF0Cbut cant create one image.
Zynq has a Dual Core ARM Cortex-A9 processor subsystem within it. With that being said, the two different BSP's, FSBL, and main() functions you are seeing are for the respective cores within Zynq. One will load on core 0, and the other on core 1.
Does that answer your question?
if i bulit a zynqfsbl and main project and select processer core 0,create one image load on core0,but the other project select proceser core 1 can,t load on core1 in the same time ,i want to know what is the meaning of this setting.sorry for my bad English
I understand now, sorry for the confusion there.
You may need to use a boot loaded to load the second core. I will look into this and post back when I get the solution.