Does anyone have a functioning reference design using the Xilinx Performance Monitor? I think my main problem might be the interconnects in XPS rather than the code.
My problem is the same as the one mentioned here, but I do not see any path issue as the OP found:
Basically when I try to read back from the Perf. Monitor block (using Xil_In32 to read register 0x104 for instance, but also any other reg), the device hangs on the read. It's assigned 0x75C00000 and I just add the offset to get the absolute address. I can read/write successfully to my other peripherals in this way.
Xilinx has some examples using Vivado but there is no XPS project so I do not know how I can check the AXI interconnects (also the project versions are too new) ...
Update: Originally I was having slot 0 monitor an axilite bus going to one peripheral, and an axi bus going to another peripheral. But, both busses connect through the same axi_interconnect to M_AXI_GP0. I deleted the AXI peripheral and reconfigured the performance monitor for one slot, and now I can read from the performance monitor. I'm not sure the correct way to configure the bus but at least I have a reference now.