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Xilinx Petalinux 2024.1 Stuck on BL31 using u96v2_sbc_base

JackBonnellDev

Hey guys currently trying to build a petalinux image using the make_u96v2_sbc_base.tcl vivado block design from Avnet/HDL but it keep hanging on the below message seen on the uart output:

image

My steps for creating the petalinux image:

  1. petalinux-create --type project --template zynqMP --name u96v2_sbc_base

  2. cd u96v2_sbc_base

  3. cd project_spec && git clone --branch 2024.1  https://github.com/Avnet/meta-avnet.git

  4. petalinux-config --get-hw-description ../u96v2_sbc_base.xsa

    • DTG Settings -> MACHINE_NAME -> "avnet-ultra96-rev1"

    • Image Packing Configuration -> Root filesystem type -> EXT4

    • Yocto Settings -> Yocto Machine Name -> "u96v2-sbc-base"

    • Yocto Settings -> User Layers -> Add new layer
      • ${PROOT}/project-spec/meta-avnet

  5. petalinux-build -c avnet-image-minimal

  6. petalinux-package --boot --fsbl ./images/linux/zynqmp_fsbl.elf --fpga ./images/linux/system.bit --u-boot --force

  7. petalinux-package --wic

  8. Flash petalinux-sdimage.wic onto a 16GB sd card using balenaEtcher.

  9. Open Putty on COM6 with 115200 speed.

  10. see output above