Ultra96 Hardware Design - Recent Threads

Ultra96v2 XADC IP not loading on Vivado

Delron — Thu, 12 Mar 2026 09:25:09 GMT

Hello

I am handling a project based on Zynq + MPSoC on the Ultra96v2 and l want to use the PL with the PS .However l cannaot seem to add the XADC IP layer on Vivado to build the hardware implementation.Is there any possible work around to get the system working?Also any possible workflows on using Yocto development guides that could make things simpler for me?

Thank you for your assistance

JTAG/UART Serial Output Not Working on Avnet Ultra96-V2-G Rev 2.1

CMTI — Tue, 25 Nov 2025 05:27:12 GMT

I’m using an Avnet Ultra96-V2-G Rev 2.1 board together with the Avnet JTAG/UART Pod.
JTAG debugging works correctly, but the UART serial communication through the same pod is not working — I am not seeing any UART output at all.

I expected the UART channel on the pod to provide the serial console, but there is no data coming through. I’ve confirmed that the target application is running, but no serial output appears.

Has anyone successfully used the JTAG/UART Pod for UART communication on the Ultra96-V2?
Or can someone confirm whether the Ultra96-V2 actually routes UART signals to this pod connector?

Any guidance or clarification would be appreciated.

Usb Ethernet gadget on Ultra96-v2 board not working properly on 2024.1 prebuild image

DominicT — Wed, 12 Nov 2025 09:25:45 GMT

Hello,

I am trying to get the USB ethernet gadget working on an Ultra96-v2 board from Avnet.

After not succeeding with my own image I tried to use the 2024.1 prebuild image provided by avnet.

The gadget is configured using the provided script which does the configuration via configfs.

This seems to work, the usb0 ethernet adapter is available and I can assign an IP etc.

But on the host PC (Ubuntu) the usb device is not enumerated a first. After approx. 30 minutes it suddenly enumerates, but only using USB2.1 and not 3.0 as configured.

I then used the debugfs interface of DWC3 driver to get more information. The link_state hangs at RX.Detect while the device is not enumerating.

Has anybody else encountered that problem as well? What could be the problem?

Any help is highly appreciated - I'm hanging on that issue for a couple of weeks already...

Best Regards,

Dominic

Hello, i want to use my board ultra96v2 with a wifi dongle to have internet, since my board wifi module does not work. Is there a suggested one? do I need a driver? thanks in advance.

cristian2099 — Fri, 24 Oct 2025 19:15:37 GMT

Hello, i want to use my board ultra96v2 with a wifi dongle to have internet, since my board wifi module does not work. Is there a suggested one? do I need a driver? thanks in advance.

v3.0.1 Ultra96 PYNQ sensors96b_v2.bsp

paracpg — Mon, 18 Aug 2025 09:39:05 GMT

Hi,

I am using Vivado / Vitis 2024.2 with PYNQ v3.0.1 and am planning to move to PYNQ v3.1.

I notice that https://github.com/Avnet/Ultra96-PYNQ/releases/tag/v3.0.1 does not have a release for the sensors96b_v2.bsp so I am planning to build the bsp.

At the moment my PYNQ v3.0.1 environment seems to work well and I am using the v3.0.0 sensors96b_v2.bsp but obviously at some point I will have to create the new bsp.

I see in https://github.com/Avnet/hdl/tree/2024.2/boards/u96v2_sbc/base that you publish a base for the xczu3eg-sbva484-1-i part. Is this the script I need for my hardware_project or is there another repository somewhere with the definition of the board support for sensors96b_v2?

I am thinking that as the Ultra96 is EOL I will have to get more creative in order to use this marvellous bit of hardware! I just snapped up one of the remaining boards to start work with a larger FPGA having spent many years with the zynq 7010 / 7020.

Peter

ZUBoard 1CG PCB is overheating near the power lines

Ravi_V — Wed, 16 Jul 2025 07:06:30 GMT

I have observed overheating (60 degrees) on the ZUBoard 1CG PCB around the power lines area. Has your team noticed this earlier?

Ultra96-V2 Boot Freeze at usbhid with Prebuilt Tria Vitis Image (2023.2)

Sv2112 — Wed, 16 Jul 2025 06:55:23 GMT

I'm using the prebuilt .img.gz from the Tria Vitis Platforms 2023.2 GitHub for Ultra96-V2. After flashing to SD and setting boot switches (SW3: 1=OFF, 2=ON), the board freezes at:

usbcore: registered new interface driver usbhid

usbhid: USB HID core driver

No USB devices are connected except micro usb to PC via the Avnet JTAG/UART pod. Is this a known issue? Could it be image corruption? There's no MD5 checksum provided — any help appreciated.

How do i enable flash on the onsemi Dual Camera Mezzanine?

caceders — Fri, 04 Jul 2025 09:16:30 GMT

We use the onsemi Dual Camera Mezzanine and Ultra96v2 with a petalinux build. We need to enable the flash pins (see images) for synchronisation. Does anyone have any experience doing this?

Dual Cam Mezz AES-ACC-U96-ONCAM-MEZ

tony56887 — Fri, 07 Feb 2025 20:30:42 GMT

Recently purchased the dual cam mezz for an Ultra96v2. I don't have a corporate email and Onsemi notified me they do not do NDAs for individuals, so I can't get the datasheet for the image processor.

Can Avnet provide it to their customers? I'm doubting, but asking anyway.

Petalinux OOB image works fine. I'd like to create my own bare-metal app to simply turn the cameras on and get data (anything) flowing. I'm only using this for simple hobby/learning exercises.

I found this link from Adam Taylor who had hackster Ultra96 projects (https://github.com/ATaylorCEngFIET/Ultra96V2_MIPI_PCAM_VITIS). It has a hardware project and bare-metal software, but the software isn't working. It fails when trying to "detect_camera" by reading over the I2C interface. I'm flying blind without the datasheet.

If Avnet can't provide the datasheet, are there any functional bare-metal designs for the Ultra96v2?

Report: Testing PL GPIO Access on the Ultra96-V2 using BSP SD Card

mainoupak — Thu, 06 Feb 2025 12:45:33 GMT

Testing PL GPIO Access on the Ultra96-V2 and Findings

Background

Before this experiment, we conducted a series of tests using the preloaded BSP SD card on the Ultra96-V2 to evaluate how well it supported direct GPIO control through Linux.

Testing PS GPIOs (MIO)
- We controlled an LED placed on pin 23 of the J5 LS header, which is mapped to MIO36 of the Processing System (PS).
- Using the Linux sysfs interface, we successfully turned the LED on and off using terminal commands.
Controlling the LED via a Web Interface
- We confirmed that the BSP SD card included all necessary Python3 libraries, such as Flask, mraa, and others.
- Using Flask, we built a simple web application that allowed LED control via a browser.
Extending the Experiment to PL GPIOs
- The logical next step was to test whether a similar approach could be used for PL GPIOs (Programmable Logic GPIOs).
- Specifically, we wanted to control an LED placed on pin 3 of the J5 LS header, which corresponds to HD_GPIO_0 in Bank 26 of the PL.
- The goal was to see if the preloaded BSP SD card already contained support for PL GPIOs or if modifications were needed.

Tests Performed

Checking Available GPIOs in Linux
- We listed the available GPIO chips using ls /sys/class/gpio/ and identified several gpiochip entries.
- gpiochip331 contained 174 GPIOs, which aligned with the PS MIO pins.
- gpiochip510 was also detected but contained only 2 GPIOs, which did not match the expected number of Bank 26 GPIOs.
Verifying PL GPIO Mapping

We checked the device tree for AXI GPIO assignments using: grep -r "axi_gpio" /proc/device-tree/ This returned nothing, indicating that no AXI GPIOs were defined in the device tree.

We searched for references to Bank 26 GPIOs using: grep -r "bank26" /proc/device-tree/ and grep -r "hd_gpio" /proc/device-tree/ These also returned no results, confirming that the current system configuration does not expose PL GPIOs.
Testing GPIO Control with Existing Mapped GPIOs
- We attempted to export and toggle gpio510 and gpio511, but they did not control the LED.
- We repeated the process with gpio367, mapped to MIO37, but this was also unrelated to the PL.
Reviewing ZynqMP Architecture and Understanding Why PL GPIOs Were Missing
- According to Xilinx documentation, MIO GPIOs are part of the PS and are mapped under zynqmp_gpio (which we confirmed via gpiochip331).
- PL GPIOs, however, require an AXI GPIO block to be instantiated in Vivado and connected to the PS through EMIO (Extended Multiplexed I/O).
- Since no AXI GPIO nodes appeared in the device tree, the default bitstream does not include the necessary AXI GPIO mapping.

Findings and Why They Matter:

The preloaded BSP SD card fully supports PS GPIOs (MIO), but it does not expose PL GPIOs (HD_GPIO_x, Bank 26).
The absence of AXI GPIO entries in the device tree confirms that no AXI GPIO block exists in the current bitstream.
The BSP image does include Python3 libraries and frameworks (such as Flask and mraa), meaning that once PL GPIOs are available, they can be controlled the same way as MIO GPIOs.
Without an AXI GPIO block in the Vivado design, the PL GPIOs cannot be accessed through Linux.

Discussion: Did We Miss Anything? Validating Our Approach for PL GPIO Access just unpacking our Ultra96-V2 withouth a new .bit file

Based on our testing and findings, it appears that the current bitstream does not provide access to PL GPIOs. The lack of AXI GPIO entries in the device tree and the inability to export PL GPIOs via /sys/class/gpio/ strongly suggest that the PL GPIOs were not mapped in Vivado.

Our next logical step is to modify the Vivado design by adding an AXI GPIO block that maps Bank 26 GPIOs (HD_GPIO_x) to the PS via EMIO. Once this updated bitstream is generated, we plan to:

Load it dynamically onto the Ultra96 using fpgautil, ensuring only the PL is reprogrammed while keeping the PS unchanged.
Check if a new gpiochip (e.g., gpiochip512) appears in /sys/class/gpio/, indicating that Linux has recognized the new AXI GPIO block.
Export and control the new GPIOs via standard Linux commands to confirm that PL GPIO access is now working.

Once this process is validated, we should be able to apply the same Linux command-line, shell script, and web-based control methods that were successfully used for MIO GPIOs.

Open Questions for the Community

Does our approach seem correct, or is there a more efficient way to enable PL GPIO access in Linux?
Is adding an AXI GPIO block in Vivado the best approach, or should we be considering another method, such as modifying the existing device tree to expose EMIO GPIOs directly?
When using fpgautil to load the .bit file dynamically, are there any risks of conflicts with the preloaded BSP configuration?
Has anyone successfully controlled PL GPIOs on Ultra96-V2 without modifying the default bitstream? If so, how was it achieved?

Xilinx Petalinux 2024.1 Stuck on BL31 using u96v2_sbc_base

JackBonnellDev — Mon, 25 Nov 2024 12:27:29 GMT

Hey guys currently trying to build a petalinux image using the make_u96v2_sbc_base.tcl vivado block design from Avnet/HDL but it keep hanging on the below message seen on the uart output:

My steps for creating the petalinux image:

petalinux-create --type project --template zynqMP --name u96v2_sbc_base
cd u96v2_sbc_base
cd project_spec && git clone --branch 2024.1 https://github.com/Avnet/meta-avnet.git
petalinux-config --get-hw-description ../u96v2_sbc_base.xsa
- DTG Settings -> MACHINE_NAME -> "avnet-ultra96-rev1"
- Image Packing Configuration -> Root filesystem type -> EXT4
- Yocto Settings -> Yocto Machine Name -> "u96v2-sbc-base"
- Yocto Settings -> User Layers -> Add new layer
  - ${PROOT}/project-spec/meta-avnet
petalinux-build -c avnet-image-minimal
petalinux-package --boot --fsbl ./images/linux/zynqmp_fsbl.elf --fpga ./images/linux/system.bit --u-boot --force
petalinux-package --wic
Flash petalinux-sdimage.wic onto a 16GB sd card using balenaEtcher.
Open Putty on COM6 with 115200 speed.
see output above

Petalinux 2024.1 Build Error for Ultra96-V2 with WILC Driver on Kernel 6.8.0

agingwarrior — Mon, 28 Oct 2024 11:15:26 GMT

Hello,
I'm working on a Petalinux project with the Ultra96-V2 board on kernel version 6.8.0 (Ubuntu 22.04 LTS), using Petalinux 2024.1. I've set up my project using the steps listed below:

cd ~
mkdir Avnet_2024_1
cd ~/Avnet_2024_1
git clone https://github.com/Avnet/bdf
git clone -b 2024.1 https://github.com/Avnet/hdl
git clone -b 2024.1 https://github.com/Avnet/petalinux

Then I initiate the build with:

cd ~/Avnet_2024_1/petalinux
scripts/make_u96v2_sbc_base.sh

I encountered build errors with the WILC driver in `bt.c` and `power.c` files. The errors seem to be related to deprecated functions that are incompatible with the latest kernel. Specifically, the following issues arise:

1. Error with `class_create`:
   - Error: `too few arguments to function 'class_create'`
   - It seems the function signature has changed in newer kernels, requiring an explicit owner argument.

2. Error with `of_get_named_gpio_flags`:
   - Error: `implicit declaration of function ‘of_get_named_gpio_flags’`
   - This function appears to be deprecated in favor of `gpiod` (GPIO descriptor) APIs.

I tried manually updating the code to address these compatibility issues, such as replacing `of_get_named_gpio_flags` with `gpiod_get`. However, I’m still unsure if I’m implementing this correctly, and I'm looking for guidance on how best to adapt the WILC driver for compatibility with the 6.8.0 kernel.

Has anyone faced a similar issue with the WILC driver on Ultra96-V2 or with recent kernel updates? Any advice or solutions would be greatly appreciated! I am able to complete the build if the wilc driver is removed from the petalinux build list.

Thanks in advance for your help!

Can we run YOLO-v8 script on Utra96-V2 board?

jiang_zhu — Thu, 08 Aug 2024 03:35:42 GMT

Hello,

Does anyone know if YOLO-v8 script can be run on Ultra96-V2 board? We have an Industrial version Ultra96-V2 board Ultra96-V2-I-G on which we have the following Linux build and tried to run our script with YOLO-v8. We got an "Illegal instruction" error.

System Configuration
OS Name              : Linux
Release              : 5.15.36-xilinx-v2022.2
Version              : #1 SMP Mon Oct 3 07:50:07 UTC 2022
Machine              : aarch64
CPU Cores            : 4
Memory               : 1986 MB
Distribution         : PetaLinux 2022.2_release_S10071807 (honister)
GLIBC                : 2.34
Model                : unknown

Thanks a lot,

Jiang Zhu

AES-ULTRA96-V2-I-G Wi-Fi not functioning

jiang_zhu — Mon, 05 Aug 2024 16:39:51 GMT

Hello,

Recently we bought an AES-ULTRA96-V2-I-G board with which Wi-Fi did not work. This board is an Industrial version of Ultra96-V2 board. We checked an existing thread for Ultra96-V2 Wifi issue. It seems that we are facing the same issue which has not yet been solved. /products/devtools/avnetboardscommunity/avnetboard-forums/f/ultra96-hardware-design/53288/ultra96-v2-wifi-connection/222561. We are not sure if it is software issue which can be fixed by some script commands, or a hardware issue like what is mentioned in this existing thread - a "wrong component was mounted on Y1 on some boards with Ultra96-V2".

Cannot download boot image file from avnet-site

TN0 — Thu, 25 Jul 2024 12:41:52 GMT

Hi, I bought the AES-ACC-U96-ONCAM-MEZ three days ago from Farnell. I am trying to download the out-of-the-box boot image.

According to the Getting Started Guide, the boot image archive can be downloaded here: http://avnet.me/DualCameraMezz.

However, by clicking on this link, I get this error message:

"Load cannot follow more than 20 redirections" or ERR_TOO_MANY_REDIRECTS

I have already tried successfully to download the factory oob for the avnet ultra96 (ultra96v2_oob_2020_1_210303_8GB). This was working, and I have also run it on the u96 bard successfully.

To understand if there was some problem with the browser or platform, I have tried the same with two different browsers and two different platforms.

Regards,

Tormod

Ultra96-V2 2021.2 student.zip file for SW Training

FPGARenegade — Tue, 28 May 2024 03:54:15 GMT

Hello,

I am attempting to traverse the Ultra96-V2 2021.2 training. The software track (which is recommended first) relies on files installed from a .zip file called student.zip. I have not been able to find this file. Can someone kindly point me to where I can download this file so I can continue on my journey?

Thanks,

Jon

Yocto with meta-avnet layer, without petalinux SDK

tony56887 — Sun, 19 May 2024 16:44:17 GMT

Experienced FPGA developer using Xilinx devices. Very inexperienced in software/OS/yocto/petalinux.

I'm wondering how difficult it's going to be for me to build up a yocto image for my Ultra96-V2 using Yocto, and adding in the meta-avnet layer manually. I'm not using a petalinux SDK environment, so using yocto manually. I have images booting, and have 'played' around quite a bit experimentally. It appears that most of what is in the Xilinx repos are targeting the old Ultra96-V1 which had different hardware, the DDR and Wifi/bluetooth devices being the most significant. I'm using my own custom Vivado build, which takes care of the DDR. However, the drivers for the wifi/bluetooth and related are targeting the old device, so that fails.

What kind of struggle am I looking at doing this all from a manual yocto environment? Are there any yocto tutorials or projects out there specific to the V2? Any tutorials that are using the meta-avnet layer without the petalinux SDK? I've already tried adding the meta-avnet layer to my custom yocto environment, but it's failing and appears heavily dependent on working within the petalinux SDK framework.

Ultra96 v2 2022.2 BSP wilc_15.6.bb issues

caccolillo — Sun, 12 May 2024 09:09:06 GMT

The build process of the "avnet-image-full" fails because of an issue in the bitbake recipe "wilc_15.6.bb":

it looks like the do_fetch cannot complete.

By opening the recipe that is failing:

I can find the link to the git repo from which the source file is downloaded:

git://github.com/linux4sam/linux-at91.git

it seems as if the branch referred in the recipe, as well as the sub-path are there:

so the recipe is pointing to somewhere which sounds still valid.

Could you please advise how to fix the error?

If not, could you please tell me how to exclude the offending bitbake recipe from the builds?

I would be more than happy of using a wifi usb dongle, in substitution of the on board Microchip module.

Thank you for taking the time to look into this matter.

Kind regards.

Marco.

recompile booting file for Ultra96 V2

glee263 — Sun, 17 Mar 2024 21:33:53 GMT

Hello,

I am new here, and I don't have any background on this.

I got the project to bring up this: https://github.com/zhe-ch/ACTEV.

The published booting file was built for the Ultra96 V1, which I was not able to acquire.

We tried to boot the Ultra96 V2 with the published booting file, but booting never get done, and I don't get any output from the Tera Term (via JTAG).

Is there a instruction to recompile V1 booting file for V2?

Thanks in advance!

Gichan

ERROR: [BD 5-390] IP definition not found for VLNV: xilinx.com:ip:zynq_ultra_ps_e:3.4

StudentUMH — Tue, 06 Feb 2024 12:24:28 GMT

Hi everyone!

I'm new in Vivado Suite and I've installed the newest version (2023.2) to prepare mi device for an university project. I've been following a guide from last year for Vivado 2022.2, in the guide we need to install avnet repositories to prepare a acceleration hw platform using bdf and hdl repositories. I tried installing the branch 2023.1 but it seems to work only with Vivado 2022.2. If i change the required version to 2023.2 to let the code continue i reach to the error at the subject. I've been trying to find at every .xml file in the repositories for a version specification for zynq_ultra_ps_e but it seems there aren't. I'm also trying to download an IP with 3.4 version but i couldn't find it. If anyone knows a way to help me other than downloading Vivado 2022.2 I would be very greatful.

Ultra96-V2 Board

foxnard — Fri, 02 Feb 2024 01:27:03 GMT

I'm just saying hi to the community since I just joined it. Looks like most of the postings regarding the Ultra96 were years ago. So I'm late to the party, having recently discovered it, and purchased one. I've built the Pynq image for it, but have a lot before me to make use of it.I have some of the slow speed interface add-ons, but haven't found where to get add-ons for the high-speed interface connector. I saw a posting somewhere about moving most of the root file system to a USB flash drive, but that it probably still needs some of the boot files on the SD card. I'm thinking that might make it run faster given the SD card read/write speed vs the USB3 transfer rates to a quick Flash drive.

Dear experts, may I ask if this development board can be used for optical coating machines? If not, which development board can be used for optical coating machines? Thank you very much.

little_white — Sat, 25 Nov 2023 08:10:15 GMT

Dear experts, may I ask if this development board can be used for optical coating machines? If not, which development board can be used for optical coating machines? Thank you very much.

Ultra96 FPGA board stopped working after few minutes - LEDs only flashing

xcatpc — Sat, 14 Oct 2023 03:27:24 GMT

Long time ago, I guess it was around 2020, I bought a Ultra96 board.
I played around a bit and then it was stored in good conditions.
Yesterday I tried to start a new project and it worked but suddenly I the board was of. As I tried to start it again I realized that all LEDs are blinking at the same time for a second and then the board don't start. Do you know something about this issue.

I would be very sad, if the board is broken :(

A video of the Ultra96 issue is attached here: https://omesh.io/VID_20231003_212227.mp4

Hopefully I can do something to fix it.

Ultra96-V2 No Wifi or Bluetooth

redmed — Thu, 12 Oct 2023 13:49:44 GMT

Hello everyone,

I have recently bought an Ultra96 V2. I managed to flash the SD card with the latest OOB image available from Avnet but the Ultra96 doesn't bring up the Access Point and it doesn't work either when I try with the ./wifi.sh script.
I also tried with the latest Pynq image and I also built with petalinux the latest U96V2 SBC BSP (2022.2) but nothing changes.

Here is the error I have at boot time:

[   13.881500] wilc_sdio mmc1:0001:1 p2p0: Failed to get RSSI value
[   13.894769] power up request for already powered up source Wifi
[   13.900811] wilc_sdio mmc1:0001:1 p2p0: Failed to set driver handler
[   13.907269] wilc_sdio mmc1:0001:1 p2p0: Failed to get mac address
[FAILED] Failed to start Access point for Ultra96.

When trying with wifi.sh:

root@u96v2-sbc-base-2022-2:~# ./wifi.sh
Stopping Connection Manager
ifdown: interface wlan0 not configured
Successfully initialized wpa_supplicant
nl80211: kernel reports: Authentication algorithm number required[ 442.409487] power up request for already powered up source Wifi
[ 443.164679] wilc_sdio mmc1:0001:1 wlan0: WLAN initialization FAILED
Could not set interface wlan0 flags (UP): Timer expired
nl80211:[ 443.171509] wilc_sdio mmc1:0001:1 wlan0: Failed to frame register
Could not set interface 'wlan0' UP
nl80211: deinit ifname=wlan0 disabled_11b_rates=0
wlan0: Failed to initialize driver interface
[ 443.201258] power up request for already powered up source Wifi
[ 443.207246] wilc_sdio mmc1:0001:1 wlan0: Failed to set driver handler
[ 443.213759] wilc_sdio mmc1:0001:1 wlan0: Failed to get mac address
RTNETLINK answers: Invalid argument
udhcpc: started, v1.34.1
[ 444.653053] power up request for already powered up source Wifi
[ 445.404683] wilc_sdio mmc1:0001:1 wlan0: WLAN initialization FAILED
RTNETLINK answers: Timer expired
udhcpc: broadcasting discover
udhcpc: sendto: Network is down
udhcpc: read error: Network is down, reopening socket

And finally the errors I've got when trying to bring up the Bluetooth interface:

root@u96v2-sbc-base-2022-2:~# ./bt.sh
[ 470.128734] wilc_sdio mmc1:0001:1 wlan0: Failed to set driver handler
[ 470.156962] wilc_sdio mmc1:0001:1 p2p0: Failed to set driver handler
[ 472.365450] wilc_sdio mmc1:0001:1 wlan0: Failed to get RSSI value
Device setup complete
[ 475.644614] Bluetooth: hci0: command 0x1003 tx timeout
[ 477.660590] Bluetooth: hci0: command 0x1001 tx timeout
[ 479.676581] Bluetooth: hci0: command 0x1009 tx timeout
[ 479.681822] wilc_sdio mmc1:0001:1 wlan0: WLAN initialization FAILED

I could access another Ultra96 V2 and with the same OOB, the Wifi was brought up so I thought it was an hardware issue with my board. But when I got my new Ultra96 V2 board (100% sure that it's NOT the same as the 1st one), I've got the same issue.

Is there anything special to do or change to use the Wifi/BT module?

Thank you very much.

VNC server in Petalinux - can't find

rscasny — Sat, 26 Aug 2023 17:26:09 GMT

I have a member who needs some help regarding VNC Server in petaLinux.

He's tried to find the VNC server enabled Image but could not find it.

Can anyone help?

Randall

element14 Community Team