Ultrazed Hardware Design - Recent Threads

UltraZed SOM issue

chasekim — Thu, 07 May 2026 20:36:49 GMT

Hello,

I have a problem for new purchased of UltraZed SOM about the MMC access error by FSBL and I2C-2 read error, seems to be slow booting time via EMMC.

We already verified all functions by SOM-1, but the SOM-2 continues to have problems.

PS) Our build environment is Vivado 2022.1 and PetaLinux 2022.1 and Avnet release BPS.

SOM-1) Purchased few years ago Serial number

4000086

191

000010

SOM-2) New Purchased serial number

DMS2351279-2508

US2SOM REV 3-02-05

Please let me know if you have any recommend this issue.

Mechanical drawing for the AES-ZU-PCIECC-G

P.Brogli — Mon, 02 Mar 2026 07:47:45 GMT

I have found the pdf with the name: AES-ZU-PCIECC-G-Mechanical-v1.PDF (AES-ZU-PCIECC-G-Mechanical-v1.PDF - element14 Community)
I want to design a card for the FMC connector need the dimensions for it, particularely the positions of the holes on the carrier card. And those are not given in that pdf. Is there a mechanical drawing that is more complete?

Thank you

Non functioning Ultrazed EV clock generator

blindell231 — Fri, 06 Feb 2026 00:20:09 GMT

Hey all,

I'm in a bit of a pinch with the transceiver reference clock on the Ultrazed EV. As far as I can tell, the device is completely non-functional. This is specifically in reference to the GTH transceiver reference clock generator, IDT 8T49N241-048NLGI (U6).

I have ensured that the quad I am using is mapped to the right reference clock; I am using the clock on pins D9 and D10. I have actually tried all the available reference clocks, but to no avail. I am currently buffering the input with an IBUFDS_GTE4 before passing it to the Ultrascale transceiver wizard.

For debugging purposes, I used the ODIV2 port on the IBUFDS_GTE4, along with a BUFG_GT to bring the clock into the normal fpga fabric for testing. What I found was very strange. When hardwired to an led, the clock toggles the led variably, every 2-8 seconds. When the clock is hooked up to a counter that should roll over around 4 times a second, it never rolls over in a 60 second period.

It appears as though the clock has positive edges in an non-periodic manner, with a half-period of 2-8 seconds. This is confirmed by the fact that a two bit counter rolls over correctly after 8 of these 2-8 second half periods. All of this has been confirmed by the use of the ILA, as well. The clock signal is close to something like:

_____|‾‾‾‾‾‾|___________________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|___________|‾‾‾‾‾‾‾‾‾‾‾‾|______________

In that it is not periodic and appears to just toggle randomly.

To me, this is never behavior that I should see from the clock, no matter what the config is. Any thoughts? I'm planning on investigating the warranty solutions, as the board is just over a month old.

UltraZed-EV Carrier board is not powering-up

bob.foley — Thu, 18 Dec 2025 17:24:40 GMT

(sorry if this is a duplicate question - I posted it in another area as well)

I followed the simple "Getting Started" instructions meticulously and I am using the 120W power supply that came with the board. But when I try to power-on the board, I get no activity. No LEDs and no voltage on the fan pins, nothing. I have verified that there is 12V on the input pins.

What else can I do to help troubleshoot the issue?

Thank you.

-Bob F.

UltraZed-EV Carrier board is not powering-up

bob.foley — Thu, 18 Dec 2025 17:21:56 GMT

What else can I do to help troubleshoot the issue?

Thank you.

-Bob F.

AMD/Xilinx 2025.2 BSP Ultrazed EG

caiortp — Tue, 25 Nov 2025 14:36:27 GMT

Hi,

Is there any plan to release the Ultrazed BSP 2025.2?

Thank you!

Regards,

Caio

Power supply for ZYNQ

Atsu — Thu, 09 Oct 2025 12:15:38 GMT

Hi,

I'm developping our own carrier card for UG-AES-ZU7EV-SOM-G, which has Xilinx XCZU7EV-1FBVB900 MPSoC.
I have no plan to use both GTH and GTR on it.
Could anyone please let me know wheather I can omit these power source below related high speed tranceiver?

MGTAVCC
MGTAVTT
MGTRAVCC
MGTRAVTT
MGTVCAUX

Best regards,
Atsu

Power Up/Down Sequencing for Ultrazed 7EV SOM

mad_dog — Mon, 21 Jul 2025 19:31:54 GMT

Hello...I am having an issue with a custom carrier board and the required power sequencing of the SOM. Testing the sequencing with no SOM or second board mounted shows correct sequencing of all supplies starting with MGTRAVCC (0.85V) and finishing with 3.3V used to power VCCO_HD_47 and VCCO_HD_48 for HD IO banks 47 and 48. Power sequences up and back down in the order specified. Sequencing is controlled by an "always on" circuit on the board that does not touch the SOM. It just monitors the unit power switch and sequences up/down the supplies. We have a second board in this system that comes on immediately after 12V power is applied to the system (including the SOM) and this board has an independent 3.3V regulator to power itself. Circuitry on this second board has various outputs and lines with 3.3V pullups that connect to the SOM IO on banks 47 and 48. The result is these lines, driven immediately by the second board, are pushing the 3.3V VCCO_HD supply on the main board up to about 1.6V well before the other SOM supplies have sequenced up. When finally the sequencer turns on the VCCO_HD supply it then snaps right up to 3.3V. A similar issue happens on power down where VCCO_HD should be the first one turned off but it sits around 1.6V until the 12V power for the second board is removed at the very end of system power down.

We have seen a number of SOMs seemingly damaged in our system and I am suspicious that this is the culprit.Typically, we see MGTRAVCC shorted to ground on the SOM and some of the other MGT supplies show fairly low resistance to ground compared to a new, undamaged SOM. Can someone render an opinion on whether the issue described is likely to damage the 7EV SOM? The power up/down sequence is about 300mS in duration.

Thanks for any help...will be much appreciated.

UltraZed-EV low temperature failures on processor side?

Darrell-C — Thu, 19 Jun 2025 22:14:32 GMT

We have a custom board and have successfully tested multiple industrial temperature UltraZed-EVs at -32C. We recently found consistent processor side crashes (loss of comms and video) when in the -10C to -20C range. We have a large custom heatsink for the UZ and other hot components on the SOM. None of the PMUs seem to be triggering a fault. By observing the video output, we can see that the processor gets reset to the default register values, so it is not acting like it is hung up. Anyone else experience this and/or can offer some ideas?

UltraZed-EG VCCINT supply current

padudle — Fri, 30 May 2025 20:11:50 GMT

Hello,

Years ago, I used the UltraZed-EG Xilinx ZynqMP SOM for a project. Now I am working for a different company, and we are looking for a similar SOM for our instruments.

The last time I used the UltraZed-EG I ran into a current limit on the VCCINT 0.85 Volt core FPGA supply. At that time the point-of-load regulator could only supply 4 Amps. That current limit is very low and limits the applications of the SOM. At that time, I was told the SOM would be redesigned with a bigger 10 Amp supply.

Looking at the documentation today, it still states that the current limit is 4 Amps and the POL regulator shown in the documentation is only a 4 Amp supply.

Can you tell me if the UltraZed-EG is still limited to 4 Amps on VCCINT?

UltraZED-EV with FMC-SDI card to have 4KP60 via SDI (input and output)

danielsan77 — Fri, 23 May 2025 12:11:01 GMT

Hello!
I'm using the UltraZED-EV (SOM + Carrier) for a project where I need to process 4KP60 video on the FPGA (PL-side).

To do this, we'll be working with the SDI input (4KP60) and the SDI output (4KP60), and I need both the SDI input and SDI output to go to the PL-side, so I can process the 4KP60 video there (in the PL-side).

To summarize, please answer the following two questions:
1. Which FMC-SDI cards do you recommend that are compatible with UltraZed-EV (SOM + Carrier) and allow us to have 4KP60 over SDI (12G-SDI, input and output)? I've seen some FMC-SDI cards, but I'm not sure if they're compatible.
2. Do the SDI signals from the FMC-SDI card go through the PL side of the FPGA (I don't want to use the PS side) of the UltraZED-EV (SOM + Carrier)?

Thank you very much!
Daniel.

UltraZED-EV supports 4KP60 on HDMI (input and output)

danielsan77 — Fri, 23 May 2025 12:09:55 GMT

Hello!
I'm using the UltraZED-EV (SOM + Carrier) for a project where I need to process 4KP60 video on the FPGA (PL-side).

To do this, we'll be working with the HDMI input (4KP60) and the HDMI output (4KP60), and I need both the HDMI input and HDMI output to go to the PL-side, so I can process the 4KP60 video there (in the PL-side).

To summarize, please answer the following two questions:
1. Does UltraZed-EV (SOM + Carrier) support 4KP60 on both the HDMI input and HDMI output? If so, what do I need to do to make it support 4KP60?
2. In UltraZed-EV (SOM + Carrier), do the HDMI input and HDMI output signals go through the PL-side of the FPGA (I don't want to use the PS-side)?

Thank you very much!
Daniel.

UltraZED-EV supports 4KP60 on HDMI (input and output)

daniel.santamaria — Fri, 23 May 2025 11:21:34 GMT

Hello!
I'm using the UltraZED-EV (SOM + Carrier) for a project where I need to process 4KP60 video on the FPGA (PL-side).

Thank you very much!
Daniel.

Are all parts on the UltraZed-EV (AES-ZU7EV-1-SOM-I-G) industrial temperature?

Darrell-C — Thu, 15 May 2025 22:23:31 GMT

Also, the link on the Avnet site to the EV BOM does not go to a BOM.

Displayport does not work with Petalinux 2022.2 BSP

Former Member — Mon, 12 May 2025 23:31:46 GMT

Hi,

I cannot get Display on Ultrazed-EV board to work. I generated images using the Petalinux 2022.2 BSP proviced by Avnet.

Here are the related boot messages;

zynqmp-display fd4a0000.display: failed to configure link values

zynqmp-display fd4a0000.display: failed to train the DP link

JP1 is shorted, JP16 and JP17 are open. I believe in this configuration one of four pre-programmed configuration is installed which doesn't matter because all configurations programmes REFERENCE CLK 3 with 27 MHz.

Please tell me what extra configuations I have to do in the device tree to get Displayport to work. Provided BSP has no Displayport configuration.

Please help me.

Best regards,

Cem

Are there any other recommended power supplies for the carrier card other than IRPS5401MTRPBF?

cpond — Wed, 19 Mar 2025 16:03:06 GMT

I'm designing a custom carrier card and most distributors are out of stock or require large quantities. I could get a few different supplies that could provide the same levels as the IRPS5401MTRPBF but I'm sure that will result in additional headaches. I'd appreciate any suggestions for substitutes.

PS Settings for XCSU7EV-1FBVB900 FPGA in UltraZed-EV SOM board

arneldcollins — Tue, 24 Dec 2024 02:23:42 GMT

Hello,

Would anyone be able to direct me to where I could find the PS settings for the XCSU7EV-1FBVB900 FPGA of the UltraZed EV SOM board?

I am converting a working Xilinx board design to the above named board and somehow cannot obtain from the design a working fsbl. I think it is because I am missing something in the PS settings.

Therefore if there is a guide or template available somewhere I would really appreciate it if someone could guide me to it.

Thanks so much in advance!

No USB 3.0 on a Avnet UltraZed-EG-PCIe Board (with AES-ACC-WHIZZ-USB3 adapter)

weidmann — Fri, 13 Dec 2024 13:52:26 GMT

Dear Sir or Madam,

I am trying to get USB 3.0 to work on an Avnet UltraZed-EG-PCIe board.

I am using the Out of the Box Images from uz3eg_pciec_2019_1 bsp.
I have also tried the latest image from uz3eg_pciec_base_2024_1.

When I plug in a USB 3.0 device, it is only recognized as USB 2.0.

Tested devices:

    Samsung USB 3.0 SSD hard drive
    Webcam with USB 3.0
    Transcend USB 3.0 SD card reader

Output in Linux:

Webcam:
root@uz3eg-pciec-2019-1:~# lsusb -t
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Video, Driver=uvcvideo, 480M
    |__ Port 1. Dev 2, If 1, Class=Video, Driver=uvcvideo, 480M
    |__ Port 1: Dev 2, If 2, Class=Human Interface Device, Driver=usbhid, 480M

Samsung USB 3.0 SSD:
root@uz3eg-pciec-2019-1:~# lsusb -t
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-xhd/1p, 5000M
/: Bus 01.Port 1: Dev 1, Class=Class=root_hub, Driver=xhci-hcd/1p, 480M
    |__ Port 1: Dev 2, If 0, Class=Mass Storage, Driver=uas, 480M

I found the following post:
community.element14.com/.../usb-3-devices-only-detected-with-usb-2-speed

I bought the AES-ACC-WHIZZ-USB3 adapter.
With this adapter, no USB device is recognized. Even USB 2.0 does not work.

Webcam:
root@uz3eg-pciec-2019-1:~# lsusb -t
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M

Samsung USB 3.0 SSD:
root@uz3eg-pciec-2019-1:~# lsusb -t
/: Bus 02.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 5000M
/: Bus 01.Port 1: Dev 1, Class=root_hub, Driver=xhci-hcd/1p, 480M

If I connect a USB 2.0 extension cable to the AES-ACC-WHIZZ-USB3 adapter,
the devices (camera, HDD) are at least recognized again with USB 2.0.

I am attaching a photo of the setup.
I have not changed anything on the Out of the Box Image.
I cannot get any USB 3.0 device to work.

I am completely at a loss and need help.

With kind regards,
Sebastian

AES-ZU7EV-1-SOM-G heatsink

C_Cooley — Tue, 10 Dec 2024 00:37:43 GMT

Hello,

Is it possible to purchase the AES-ZU7EV-1-SOM-G heatsink as a stand-alone part? I have some SoMs that came with the smaller heatsink+fan assembly, and others that came with a heatsink that covers the entire SoM. I am interested in purchasing the heatsink that covers the entire SoM. Please let me know if this is possible. The total quantity needed is 30. Thank you.

Does the Ultrazed-EV have an IPC class rating?

mghertzel — Fri, 06 Dec 2024 23:14:05 GMT

I use the UltraZed-EV SOM board (P/N AES-ZU7EV-1-SOM-IG) and need to know what the IPC class rating is if there is one for this board. Thanks!

I bought a UltraZed-EV with Carrier Card. And looking for a tutorial for beginner.

OnekickSoft — Thu, 21 Nov 2024 01:31:37 GMT

I'm a software engineer. and in course PHD.

My rearch subject is design multiple access memory system for a drone to avoid fine obstacles.

UntraZed-EV has 50K Logical cells and has operating system PetaLinux on PS.

I've trained FPGA on ISE 14.07 on Spartan6 for an year, that board is too low spec.

Last month I bought UltraZed-EV and CC from avnet.

I've install vivado on Ubuntu 18.04 in VBOX.

For a test, I've implemented a adder on simulation with verilog.

On the ubuntu, device manager does not recognize any fpga board.

Yesterday I've install linux64 driver, but it's not work.

Is there anyone like me, give me a hint or tutorial link for a beginer.

I have Ultra96 also but not using. After optimazation, I'm going to upload on Ultra96 with smaller version.

Have a nice day!

Vitis - How to do I fix this boot / load error ?

efreeman — Mon, 28 Oct 2024 22:19:50 GMT

10:43:39 ERROR : timeout: target has not halted

10:43:39 ERROR : [Ljava.lang.StackTraceElement;@2df24288

10:43:39 ERROR : Failed to initialize the hardware Failed to detect FSBL exit status using symbol: XFsbl_Exit Retry by changing the symbol or set environment variable VITIS_FSBL_EXIT_TIMEOUT to change the wait timeout

UltraZed-EV GC LVDS Clock DC Coupling

revky — Mon, 21 Oct 2024 13:04:44 GMT

Hi,

I am using a SI5341 to generate a 400MHz to use as global clock on the UltraZed-EV+.

The SI5341 output buffer supply is +3V3 and the FPGA HP bank is +1V8.

The output buffer common mode voltage for this is 1.1V to 1.3V and swing is 350mV to 510mV. Due to the fact that the FPGA is on the SoM I cannot use ac coupling next to the FPGA.

My question is can I get away with DC coupling if the LVDS voltages are within range of the FPGA or should I use AC-coupling before the SoM Module?

Clock Generator 2 – U6, IDT 8T49N241-048NLGI on Ultrazed-ev board

Jonathan101 — Tue, 08 Oct 2024 12:12:54 GMT

Hi,

I changed the frequency of the output clocks in U6 on Ultrazed-ev development board using i2c interface in clock 2 test header.

Is it possible to reset the output clocks in U6 back to default?

Enumerating a pcie card on Ultrazerd-ev in Petalinux environment

Jonathan101 — Mon, 07 Oct 2024 15:42:31 GMT

Hi.

in short:
I made a very simple hw design consists only of MPsoc. Then build petalinux on the design. Then tried to interface the Ultrazed ev board with a pcie card. Unfortunately, the board can't enumerate any pcie card I've tried. Those pcie card enumerated successfully on Ubunutu PC.
Can you help me understand if it is problem in Vivado settings or petalinux build or something else?

**More details will be provided if necessary**