Ultrazed Hardware Design - Recent Threads

UltraZed SOM issue

chasekim — Thu, 07 May 2026 20:36:49 GMT

Hello,

I have a problem for new purchased of UltraZed SOM about the MMC access error by FSBL and I2C-2 read error, seems to be slow booting time via EMMC.

We already verified all functions by SOM-1, but the SOM-2 continues to have problems.

PS) Our build environment is Vivado 2022.1 and PetaLinux 2022.1 and Avnet release BPS.

SOM-1) Purchased few years ago Serial number

4000086

191

000010

SOM-2) New Purchased serial number

DMS2351279-2508

US2SOM REV 3-02-05

Please let me know if you have any recommend this issue.

RE: UltraZed SOM issue

iksevas — Thu, 07 May 2026 21:30:03 GMT

Any chance you can measure the eMMC clock? I would be curious to see between the two SOMs if the clock is changing frequency during the boot process.

as far as determining if there is a build difference between your boards, I would look closely at the eMMC devices on the two boards and check to see if those are different device somehow. Could be as time and device availability could result in changes.

Typically, the factory programs QSPI and eMMC with Linux out of box image. Perhaps it would make sense to get that reprogrammed onto SOM and see how that functions.

Mechanical drawing for the AES-ZU-PCIECC-G

P.Brogli — Mon, 02 Mar 2026 07:47:45 GMT

I have found the pdf with the name: AES-ZU-PCIECC-G-Mechanical-v1.PDF (AES-ZU-PCIECC-G-Mechanical-v1.PDF - element14 Community)
I want to design a card for the FMC connector need the dimensions for it, particularely the positions of the holes on the carrier card. And those are not given in that pdf. Is there a mechanical drawing that is more complete?

Thank you

RE: Mechanical drawing for the AES-ZU-PCIECC-G

iksevas — Wed, 04 Mar 2026 23:43:06 GMT

The FMC mechanicals are standard. Your FMC add-on card should follow standard outline / mounting holes. Checkout this page for some docs that may help: FMCHUB.COM – FPGA Mezzanine Cards (FMC)

RE: Non functioning Ultrazed EV clock generator

dallaspe — Tue, 17 Feb 2026 20:17:46 GMT

Just spent a day tracking down and solving the same issue. Pretty lame it's not programmed out of the box. I ended up using the .TXT file from the github link above and programming using J5 and a Digilent Analog Discovery 2.

Non functioning Ultrazed EV clock generator

blindell231 — Fri, 06 Feb 2026 00:20:09 GMT

Hey all,

I'm in a bit of a pinch with the transceiver reference clock on the Ultrazed EV. As far as I can tell, the device is completely non-functional. This is specifically in reference to the GTH transceiver reference clock generator, IDT 8T49N241-048NLGI (U6).

I have ensured that the quad I am using is mapped to the right reference clock; I am using the clock on pins D9 and D10. I have actually tried all the available reference clocks, but to no avail. I am currently buffering the input with an IBUFDS_GTE4 before passing it to the Ultrascale transceiver wizard.

For debugging purposes, I used the ODIV2 port on the IBUFDS_GTE4, along with a BUFG_GT to bring the clock into the normal fpga fabric for testing. What I found was very strange. When hardwired to an led, the clock toggles the led variably, every 2-8 seconds. When the clock is hooked up to a counter that should roll over around 4 times a second, it never rolls over in a 60 second period.

It appears as though the clock has positive edges in an non-periodic manner, with a half-period of 2-8 seconds. This is confirmed by the fact that a two bit counter rolls over correctly after 8 of these 2-8 second half periods. All of this has been confirmed by the use of the ILA, as well. The clock signal is close to something like:

_____|‾‾‾‾‾‾|___________________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|________|‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾‾|___________|‾‾‾‾‾‾‾‾‾‾‾‾|______________

In that it is not periodic and appears to just toggle randomly.

To me, this is never behavior that I should see from the clock, no matter what the config is. Any thoughts? I'm planning on investigating the warranty solutions, as the board is just over a month old.

RE: Non functioning Ultrazed EV clock generator

blindell231 — Wed, 11 Feb 2026 17:09:59 GMT

I thought it had a default configuration? I haven't programmed it yet, the board is almost new

RE: Non functioning Ultrazed EV clock generator

iksevas — Fri, 06 Feb 2026 23:00:33 GMT

You need to program the clock generator.

(+) Ultrazed EV CC problem config 8t49n241 from EEPROM - element14 Community

You program the EEPROM from I2C and it configures the programmable clock generator for you.

UltraZed-EV Carrier board is not powering-up

bob.foley — Thu, 18 Dec 2025 17:24:40 GMT

(sorry if this is a duplicate question - I posted it in another area as well)

I followed the simple "Getting Started" instructions meticulously and I am using the 120W power supply that came with the board. But when I try to power-on the board, I get no activity. No LEDs and no voltage on the fan pins, nothing. I have verified that there is 12V on the input pins.

What else can I do to help troubleshoot the issue?

Thank you.

-Bob F.

RE: UltraZed-EV Carrier board is not powering-up

iksevas — Mon, 22 Dec 2025 14:55:13 GMT

Check jumper JP3 on the SOM.

RE: UltraZed-EV Carrier board is not powering-up

iksevas — Mon, 22 Dec 2025 14:39:57 GMT

There are jumpers in the system that could prevent the system from powering up. This jumper is used to prevent regulation when programming PMICs. It probably needs to be removed.

UltraZed-EV Carrier board is not powering-up

bob.foley — Thu, 18 Dec 2025 17:21:56 GMT

What else can I do to help troubleshoot the issue?

Thank you.

-Bob F.

AMD/Xilinx 2025.2 BSP Ultrazed EG

caiortp — Tue, 25 Nov 2025 14:36:27 GMT

Hi,

Is there any plan to release the Ultrazed BSP 2025.2?

Thank you!

Regards,

Caio

RE: AMD/Xilinx 2025.2 BSP Ultrazed EG

caiortp — Wed, 26 Nov 2025 08:52:54 GMT

Thank you

RE: AMD/Xilinx 2025.2 BSP Ultrazed EG

iksevas — Tue, 25 Nov 2025 23:27:38 GMT

There is not a plan to release an updated BSP in at least the next quarter. The suggestion would be to utilize the 2024.2 BSP release as a starting point in development for the UltraZed-EG.

Power supply for ZYNQ

Atsu — Thu, 09 Oct 2025 12:15:38 GMT

Hi,

I'm developping our own carrier card for UG-AES-ZU7EV-SOM-G, which has Xilinx XCZU7EV-1FBVB900 MPSoC.
I have no plan to use both GTH and GTR on it.
Could anyone please let me know wheather I can omit these power source below related high speed tranceiver?

MGTAVCC
MGTAVTT
MGTRAVCC
MGTRAVTT
MGTVCAUX

Best regards,
Atsu

Schematic diagram for UltraZed PCIe Carrier Card (part number AES-ZU-PCIECC-G) for UltraZed-EG System-on-Module

davisrl — Wed, 27 Mar 2024 19:39:28 GMT

Avnet's website has a link for the schematic diagram of the UltraZed PCIe Carrier Card (part number AES-ZU-PCIECC-G), but the schematic that the link leads to is actually for the UltraZed I/O Carrier Card instead. Can the schematic for the UltraZed PCIe Carrier Card (part number AES-ZU-PCIECC-G) be made available?

RE: Schematic diagram for UltraZed PCIe Carrier Card (part number AES-ZU-PCIECC-G) for UltraZed-EG System-on-Module

iksevas — Tue, 02 Sep 2025 23:55:08 GMT

community.element14.com/.../PRJ_2D00_US2CAR_2C00_1_2D00_01_2D00_08_5F00_Schematic-Prints.PDF

RE: Schematic diagram for UltraZed PCIe Carrier Card (part number AES-ZU-PCIECC-G) for UltraZed-EG System-on-Module

milena — Tue, 02 Sep 2025 12:11:02 GMT

Hello,
I also need the schematic diagram of the UltraZed PCIe Carrier Card. Has anyone been able to find the documentation?

RE: Power Up/Down Sequencing for Ultrazed 7EV SOM

mad_dog — Tue, 22 Jul 2025 18:55:00 GMT

Thank you iksevas for your reply. Yes it is certainly a design flaw and will be fixed in the next revision of hardware. One odd thing is the current design does not damage every SOM. We have built around 50 of these systems without noticing this issue but it has suddenly cropped up on the latest build. I am about to modify the hardware with "cuts and jumpers" to retest and see if the problem is resolved. I was hoping I might find someone here that had seen this before, where back powering an IO bank during the power up/down sequence has actually damaged their SOM. Thanks again for your reply.

Power Up/Down Sequencing for Ultrazed 7EV SOM

mad_dog — Mon, 21 Jul 2025 19:31:54 GMT

Hello...I am having an issue with a custom carrier board and the required power sequencing of the SOM. Testing the sequencing with no SOM or second board mounted shows correct sequencing of all supplies starting with MGTRAVCC (0.85V) and finishing with 3.3V used to power VCCO_HD_47 and VCCO_HD_48 for HD IO banks 47 and 48. Power sequences up and back down in the order specified. Sequencing is controlled by an "always on" circuit on the board that does not touch the SOM. It just monitors the unit power switch and sequences up/down the supplies. We have a second board in this system that comes on immediately after 12V power is applied to the system (including the SOM) and this board has an independent 3.3V regulator to power itself. Circuitry on this second board has various outputs and lines with 3.3V pullups that connect to the SOM IO on banks 47 and 48. The result is these lines, driven immediately by the second board, are pushing the 3.3V VCCO_HD supply on the main board up to about 1.6V well before the other SOM supplies have sequenced up. When finally the sequencer turns on the VCCO_HD supply it then snaps right up to 3.3V. A similar issue happens on power down where VCCO_HD should be the first one turned off but it sits around 1.6V until the 12V power for the second board is removed at the very end of system power down.

We have seen a number of SOMs seemingly damaged in our system and I am suspicious that this is the culprit.Typically, we see MGTRAVCC shorted to ground on the SOM and some of the other MGT supplies show fairly low resistance to ground compared to a new, undamaged SOM. Can someone render an opinion on whether the issue described is likely to damage the 7EV SOM? The power up/down sequence is about 300mS in duration.

Thanks for any help...will be much appreciated.

RE: Power Up/Down Sequencing for Ultrazed 7EV SOM

iksevas — Tue, 22 Jul 2025 17:56:33 GMT

First off - if your carrier card is somehow blowing up SOMs, I would immediately stop using the Custom Carrier Card. The SOMs are too expensive to be damaging.

If you don't have one, I would procure an UltraZed-EV Carrier Card and make sure your SOMs aren't arriving pre-damaged since the Carrier Card is a known good HW environment for a sanity check. All of the SOMs are verified functional from the CM with a low overall failure rate.

So your second board is feeding the IO of the MPSoC early which in turn is back feeding the VCCO_HD (3.3V) rail on the SOM/Carrier Card. That is not good and could probably lead to device failure you are experiencing. Typically, out of sequence only results in a higher current draw during the bring up, but this is a different case all together where you are back feeding through pullups.

Have you tried physically controlling the 3.3V enable on the second board to delay this to the SOM/Carrier Card? You probably should have a load switch on that second board to pass the 3.3V to the SOM/CC in a timely manner. Perhaps monitoring the control signal that turns 3.3V on from the Carrier Card. I am curious why the 3.3V pullups come from the second board and not the Carrier Card VCCO_HD?

Also, have you verified that you are not having manufacturing problems with the JX connectors or perhaps the footprint of your MGT rails since those are the ones that seem problematic. Have your manufacturer X-Ray those boards and check for opens/shorts where you specifically see the problems.

I'm sorry you are going through this, but I am pretty certain anyone who has designed hardware has back feed a device at one time or another.

UltraZED-EV supports 4KP60 on HDMI (input and output)

danielsan77 — Fri, 23 May 2025 12:09:55 GMT

Hello!
I'm using the UltraZED-EV (SOM + Carrier) for a project where I need to process 4KP60 video on the FPGA (PL-side).

To do this, we'll be working with the HDMI input (4KP60) and the HDMI output (4KP60), and I need both the HDMI input and HDMI output to go to the PL-side, so I can process the 4KP60 video there (in the PL-side).

To summarize, please answer the following two questions:
1. Does UltraZed-EV (SOM + Carrier) support 4KP60 on both the HDMI input and HDMI output? If so, what do I need to do to make it support 4KP60?
2. In UltraZed-EV (SOM + Carrier), do the HDMI input and HDMI output signals go through the PL-side of the FPGA (I don't want to use the PS-side)?

Thank you very much!
Daniel.

RE: UltraZED-EV supports 4KP60 on HDMI (input and output)

danielsan77 — Thu, 03 Jul 2025 15:15:00 GMT

Thank you!

RE: UltraZed-EV low temperature failures on processor side?

kmikemoo — Fri, 20 Jun 2025 01:59:01 GMT

Darrell-C I have zero knowledge of these particular boards but I have lived through something similar. Is there any external circuitry that can cause the reset you are experiencing? If so, can it be isolated on a known problematic board? The reset could just be a symptom of some other phenomenon. In my scenario, one of the component suppliers provided out of spec capacitors that pulled the reset line low and caused a system reboot - which unfortunately included the emergency stop circuit that booted up active. We were experiencing this on 25% of the controllers when the temperature dropped to 0C or lower.