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Vivado - IP core instantiated in VHDL

martingaraj

Is there a way to use IP cores directly in code (VHDL/Verilog) instead of placing them into Block Design (graphical user interface) ?

 

May I ask for an example with Floating Point Operator (in VHDL/Verilog) ? How to initialize it (settings of the core) ? (because the IP core can be set to provide different operations)

 

 

The reason:

- compact code (without the need to switch between code and graphical user interface / Block Design)

- less work

- Block Design is utilized just for top view

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    Hello MartinGaraj, 

    Firstly we recommend using the UltraFlow Design Methodology which utilize the Block Design graphical user interface. Please refer to the below reference.

    http://www.xilinx.com/support/documentation/sw_manuals/ug949-vivado-design-methodology.pdf 

    As for your reasons for wanting to move to away from the Block Design

    ---It won't nessecarily be more compact unless you plan on using custom code (see reference above)

    ---It would be faster and easier to use Vivado Block Diagram GUI

    ---One other thing of note is that the Block Design is not for top view only. It provides you with a hierarchial view that you can dig down through.

    If you still want to do everything directly in code (No Block Design GUI) you can still do so. This is done by opening your IP Catalog, double clicking on the IP you wish to use, this then allows you to customize your IP before you generate it. Once you click ok and generate the IP it will appear in your project folder where you will have access to the HDL code. I would also suggest  you keep a copy of the project just in case you end up needing to change your IP.

    Also if you look in the C:\Xilinx\Vivado<version number>\data\ip directory you can find all the RAW IP.

    --Josh

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    Hello MartinGaraj, 

    Firstly we recommend using the UltraFlow Design Methodology which utilize the Block Design graphical user interface. Please refer to the below reference.

    http://www.xilinx.com/support/documentation/sw_manuals/ug949-vivado-design-methodology.pdf 

    As for your reasons for wanting to move to away from the Block Design

    ---It won't nessecarily be more compact unless you plan on using custom code (see reference above)

    ---It would be faster and easier to use Vivado Block Diagram GUI

    ---One other thing of note is that the Block Design is not for top view only. It provides you with a hierarchial view that you can dig down through.

    If you still want to do everything directly in code (No Block Design GUI) you can still do so. This is done by opening your IP Catalog, double clicking on the IP you wish to use, this then allows you to customize your IP before you generate it. Once you click ok and generate the IP it will appear in your project folder where you will have access to the HDL code. I would also suggest  you keep a copy of the project just in case you end up needing to change your IP.

    Also if you look in the C:\Xilinx\Vivado<version number>\data\ip directory you can find all the RAW IP.

    --Josh

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