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linux crash after PL load

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I have made a simple hardware design for the PL. I can load it with either JTAG or by cat'ing the file into xdevcfg. Once the hardware is loaded, it functions properly. Howver, all contact with the PS (running Linux) is gone. No terminal, no ethernet. Is it not possible to just load a bit file with no reference to the processor? Looking in the UCF there doesn't appear to be any reference to any processor specific IOs. I'm guessing that I need to route some PS dedicated pins to some specific hardware pins, but I would have thought that could be done without anything loaded into the PL at all. Any insight would be appreciated.

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    Although the claim is that the PS and PL are independent, my intuition tells me that isn't the case.  Booting with Linux requires a device tree binary file on the SD card so that the OS can know which peripherals are defined, their addresses, etc.  It uses that information to load and run drivers.  The peripheral addresses seem to be defined within XPS.  If I change the addresses in XPS, build a new bitstream and load it, wouldn't I reasonably expect Linux to have a fit?  Additionally, if there are any drivers actively talking to hardware, and the PL goes through a reset at the start or completion of the bitstream load, wouldn't I reasonably expect the OS to experience an AXI bus error?  The idea that the PS and PL are independent doesn't seem like it is possible to me.

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    Although the claim is that the PS and PL are independent, my intuition tells me that isn't the case.  Booting with Linux requires a device tree binary file on the SD card so that the OS can know which peripherals are defined, their addresses, etc.  It uses that information to load and run drivers.  The peripheral addresses seem to be defined within XPS.  If I change the addresses in XPS, build a new bitstream and load it, wouldn't I reasonably expect Linux to have a fit?  Additionally, if there are any drivers actively talking to hardware, and the PL goes through a reset at the start or completion of the bitstream load, wouldn't I reasonably expect the OS to experience an AXI bus error?  The idea that the PS and PL are independent doesn't seem like it is possible to me.

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