With ultra96-v1 I can establish PS-PL axi interconnection and transfer processed data from PL to PS DDR, but no luck with Ultra96-V2.
I have changed the PS DDR configuration according to
LPDDR4 Memory differences between Ultra96-V1 and Ultra96-V2
Hello,I have just ordered AES-ULTRA96-V2 board and I didn't know that the power adapter is not supplied with it. I found an adapter which supplies 12V 2A, is it sufficient for the board ? I saw that the website has 12V 4A adapter.Thank you for the…
I have built a new Petalinux 2018.3 image with the usage of the BSP from https://github.com/Avnet/Ultra96-PYNQ from image_2.4_v2 and added my own hardware design from Vivado 2018.3.
petalinux-config --get-hw-description /path-to-sdk-folder