This blog is in continuation to my earlier blog “Working with Multicore blinky example (M4 core as master, M0 as slave) using OM13077[exploring multicore platform using existing example project using LPC54102 microcontroller on LPCXpresso]” the content in this blog has been cited from https://community.nxp.com/message/630715
The LPC54102 is a member of the LPC54100 family of devices, integrating two 32-bit ARM cores. Targeted for low power applications, this device is optimized for the lowest power consumption in active mode and also provides excellent power numbers in stand-by and power-down modes.
The two cores, a Cortex-M4F and a Cortex-M0+, can work independent of each other or team up to work on shared tasks.
Below are the steps involved in this activity:
1) Import the required LPC chip and board library project
2) Create a New Slave project
a) Import CMSIS_DSPLIB_CM0 library
b) Setting Memory configuration for slave project
3) Create a New Master project
a) Import CMSIS DSP Library for CM4 core
b) Memory Configuration for master project
4) Debugging a master / slave project pair
a) select the emulator and SWD configuration for master Cortex-M4
b) Add breakpoint inside master.c and resume the debugging process
c) Select SWD device as Cortex-M0+ and resume the debugging
Overview of creating a master / slave project pair
A multicore application in LPCXpresso consists of two linked projects - one project containing the slave code, and the other project containing the master code. The 'Master' project will also contain a link to the 'Slave' project which will cause the output image from the 'Slave' to be included into the 'Master' image. The following steps detail how such a pair of projects can be created and linked.
Import the required LPC chip and board library project
You need to import the required chip library project and LPC board library project from “C:\nxp\LPCXpresso_8.1.4_606\lpcxpresso\Examples\LPCOpen\lpc5410x_lpcxpresso_54102_lpcxpresso_3.01a.zip”
- lpc_board_lpcxpresso_54102
- lpc_board_lpcxpresso_54102_m0
- lpc_chip_5410x
- lpc_chip_5410x_m0
Create slave project
Click on New project from quickstart panel
Select LPC5410x Multicore (M0+ slave) from New project window as shown: And ‘LPCOpen - C Project’ need to be selected.
Enter project name of your choice i have selected as “example_M0+_slave”
Next select appropriate chip library and board library for the M0+ i.e lpc_chip_5410x_m0 and lpc_board_lpcxpresso_54102_m0
Import CMSIS_DSPLIB_CM0 library
Next import CMSIS_DSPLIB_CM0 lib as shown below:
Select the path “C:\nxp\LPCXpresso_8.1.4_606\lpcxpresso\Examples\CMSIS_DSPLIB”
Click Next
After selecting DSPLIB_CM0 proceed further by clicking Next
On 'Other options', ensure Code Read Protect (CRP) is unticked
Setting Memory configuration for slave project
On the Memory Configuration Editor page, you should see the various memory blocks defined by default for the target MCU.
We need to modify the default memory map to only use the memory that will be used by the Cortex-M0+ (rather than the Cortex-M4).
Only Ram1_32 should be retained
Then click finish to create the slave configuration project:
Create master project
Click on New project from quickstart panel as we did earlier
Create new project by entering name of your choice: “example_M4_master”
Select the required target MCU, say LPC54102J512, and click Next.
On the LPCOpen Library Project Selection page, select the LPC5410x chip library for the M4, say lpc_chip_5410x, and then the appropriate board library, for example lpc_board_lpcxpresso_54102, and click Next.
Import CMSIS DSP Library for CM4 core
Click Next through CMSIS DSP Library selection and Part specific options pages.
Proceed further by clicking next on other windows option and On 'Other options', ensure Code Read Protect (CRP) is ticked.
Memory Configuration for master project
On ‘Memory Configuration Editor’ leave the memory definitions as per the default.
On 'Multicore Project Setup' page, use the 'Browse' button in the Multicore Slave Project selection box to select the Multicore M0+ project that you created previously:
Click finish
If you now select the master project in the Project Properties view, then select the Build option in the Quickstart view, this should trigger a build of the slave project, followed by the master project (and if necessary also the LPCOpen library projects).
Note: that a copy of the executable generated by the Slave project will actually be embedded into the Master project executable.
Debugging a master / slave project pair
Start a debug session for Master project using the Debug option in the Quickstart view.
Click on Debug option as shown below:
Select the emulator and SWD configuration for master Cortex-M4
Now select the emulator LPC-LINK2 CMSIS-DAP as shown below:
Next select the SWD configuration devices as Cortex-M4 as shown below
Having selected the appropriate core, LPCXpresso should download the executable containing both the Master and Slave images into the target MCU flash memory.
Add breakpoint inside master.c and resume the debugging process
Once the connection has been made, you should hit the default breakpoint at the start of main() in the Master executable :
Click on Resume button as shown below:
The execution will come and wait at “boot_multicore_slave();”
At this point, select the Slave project in the Project Explorer view, then use the Quickstart view Debug option to start a second debug connection.
LPCXpresso should detect that this is a Slave project and make an ‘attach only’ connection (and hence not download code and leaving the slave image 'executing').
Select SWD device as Cortex-M0+ and resume the debugging
Now select the SWD device as Cortex-M0+ the only available option
Now there are two debug sessions available as shown below:
Now click again Resume button while debug session is in Master
Now step over the boot_multicore_slave() function in the master image, and the slave core will begin to execute, hitting the default breakpoint on it’s main():
You can now debug both cores in parallel, selecting which core to step, resume, suspend, etc by switching between them in the Debug View.
Note: Although there is no debug logic synchronising debug operations on the two cores, you can select both applications at the same time in the Debug View (typically by using CTRL-Click) and operations like step, resume, suspend, etc will then be carried out on both cores by the debugger in parallel.
The currently selected core will be the one used for displaying many of the debug related views, such as Registers and Locals. It is also possible to create copies of many of the debug related views, and lock each copy to a particular core.
Happy working on with multicore platform 
Select SWD device as Cortex-M0+ and resume the debugging
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