https://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kitProduct Detail Documentsen-USTelligent Community 12https://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kitFri, 05 May 2023 16:08:42 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:0b7ae308-1b40-42f5-b707-fea19fff4d33e14-publisherhttps://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kit#commentsCurrent Revision posted to Documents by e14-publisher on 5/5/2023 4:08:42 PM<br /> <div id="product-page-content"> <h1 class="xs-mt0 xs-mb2">Virtex-7 FPGA VC7222 Characterization Kit</h1> <div class="xs-mb3"><span class="bold xs-mr1">Manufactured By:</span>XILINX</div> <div class="xs-flex md-flex-row xs-flex-column"> <div class="md-w40 xs-w100"> <div id="devtool-primary-image" class="devtool-primary-image-container fill-white"> <img src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x439_1579633556.png" class="devtool-image-devtool-0 xs-w100 xs-full-height fill-white obj-fit-contain xs-block" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x300_1579633556.png" class="devtool-image-devtool-1 xs-w100 xs-full-height fill-white obj-fit-contain xs-hide" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> <div class="xs-flex xs-flex-wrap xs-mt2"> <div class="devtool-thumbnail fill-white xs-border-lighter txt-center xs-mr1 xs-mb2"> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x439_1579633556.png" id="devtool-0" class="xs-w100 xs-full-height obj-fit-contain" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> <div class="devtool-thumbnail fill-white xs-border-lighter txt-center xs-mr1 xs-mb2"> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x300_1579633556.png" id="devtool-1" class="xs-w100 xs-full-height obj-fit-contain" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> </div> </div> <div class="md-w60 md-pl4 md-pl4 md-pt0 xs-w100 xs-pl0 xs-pl0 xs-pt2"> <div class="xs-flex xs-flex-justify-space-between xs-flex-align-center xs-border-lighter fill-white xs-p2"> <div class="xs-mt1 xs-mb1"> <div class="xs-text-5"><span class="bold xs-mr1">Part Number:</span><span id="part-number-value">CK-V7-VC7222-G</span></div> </div> <div class="xs-text-right xs-mr2"> <a id="e14-product-link-9569e" data-at-areainteracted="design-center" data-at-type="click" data-at-link-type="button" href="https://referral.element14.com/OrderCodeView?fsku=2802757&nsku=42AC9919&COM=e14c-noscript&CMP=e14c-noscript&osetc=e14-noscript-tracking-loss" data-at-label="PRODUCT_POPUP_OPEN"class="e14-embedded e14_shopping-cart-far e14-button" onclick="event.preventDefault();e14.func.displayProduct(e14.meta.user.country, this, 'embedded-link', e14.func.getProductLinkJSON('9569e'));" data-farnell="2802757" data-newark="42AC9919" data-comoverride="" data-cmpoverride="" data-cpc="" data-avnetemea="" data-avnetema="" data-avnetasia="" >Buy Now</a> </div> </div> </div> </div> <div class="xs-mt3"> The kit provides the hardware environment for characterizing and evaluating the GTH and GTZ transceivers available on the Virtex-7 XC7VH580T-G2HCG1155E FPGA while allowing evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using the Vivado&reg; Design Suite. Each GTH and GTZ Quad and its associated reference clock are routed from the FPGA to SMA and Samtec BullsEye connector. A cable containing a BullsEye connector and standard SMA connectors allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment. Each BullsEye connector handles a full GTH or GTZ Quad, four transmit/receive pairs, enabling the highest level of flexibility in testing custom applications. Find out more and see what is included in the kit. </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Features</h3> <ul> <li>Hardware environment for characterizing and evaluating the GTH and GTZ transceivers on Virtex-7 VH580T FPGAs</li> <li>Hardware, design tools, IP, and pre-verified reference designs</li> <li>Integrated Bit Error Ratio Test (IBERT) reference design</li> <li>System ACE&trade; SD controller</li> <li>Expand I/O with 2 FPGA Mezzanine Card (FMC) interface</li> <li>BullsEye connector supporting a full GTH or GTZ Quad, with four transmit/receive pairs</li> <li>Six Samtec BullsEye connector pads for the GTH transceivers and reference clocks</li> <li>Two Samtec BullsEye connector pads for the GTZ transceivers and reference clocks</li> <li>Two pairs of differential MRCC inputs with SMA connectors</li> </ul> <h3 class="toc-item xs-pb2 xs-border-bottom">Ships With</h3> <ul> <li>Evaluation Board XC7VH580T-G2HCG1155E</li> <li>Samtec Bullseye Cable</li> <li>USB Cable</li> <li>Vivado Design</li> <li>Superclock2 Module</li> </ul> <div id="devtool-required-devtools-section" class="xs-hide"> <h3 class="toc-item xs-pb2 xs-mb1 xs-border-bottom">Required Tools</h3> <div id="devtool-required-devtools-content"></div> </div> <div id="devtool-accessory-devtools-section" class="xs-hide"> <h3 class="toc-item xs-pb2 xs-mb1 xs-border-bottom">Accessory Tools</h3> <div id="devtool-accessory-devtools-content"></div> </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Documents</h3> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">Quick Start Guide</h4> <div class="attachment xs-mb3"> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/support/documentation/boards_and_kits/vc7222/2015_1/ug971-vc7222-ibert-gsg.pdf" target="_blank">Virtex-7 FPGA VC7222 Characterization Kit IBERT Getting Started Guide (pdf)</a> </div> </div> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">User Manual/Guide</h4> <div class="attachment xs-mb3"> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/support/documentation/boards_and_kits/vc7222/ug965-vc7222-gth-gtz-char-board-ug.pdf" target="_blank">Virtex-7 FPGA VC7222 GTH and GTZ Transceiver Characterization Board User Guide (pdf)</a> </div> </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Downloads</h3> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">Schematics/Layout Files</h4> <div class="attachment "> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=345410&amp;filename=xtp304-vc7222-schematic-rev-c.pdf" target="_blank">VC7222 Schematics PDF (Rev. C) (pdf)</a> </div> <div class="attachment "> <i class="fal fa-file-archive"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=345412&amp;filename=xtp305-vc7222-allegro-board-rev-c.zip" target="_blank">VC7222 Allegro Board PDF (Rev. C) (zip)</a> </div> <div class="attachment xs-mb3"> <i class="fal fa-file-archive"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=195577&amp;filename=sclk2-allegro-board-xtp256-rev1-0.zip" target="_blank">SuperClock2 Allegro Board PDF (Rev 1.0) (zip)</a> </div> </div> </div> <div class="xs-hide"> <script>e14.meta.page.devtools={"id": 4947, "type": "devtool", "part_number": "CK-V7-VC7222-G" };</script> </div> <div style="clear:both;"></div> <div style="font-size: 90%;">Tags: xilinx, primary_platforms, fpga, mcu, Virtex, Characterization Kit, development_platforms_kits, VC7222</div> https://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kit/revision/3Thu, 16 Dec 2021 23:39:32 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:0b7ae308-1b40-42f5-b707-fea19fff4d33e14-publisherhttps://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kit#commentsRevision 3 posted to Documents by e14-publisher on 12/16/2021 11:39:32 PM<br /> <div class="xs-hide"> <script>e14.meta.page.devtools={"id": 4947, "type": "devtool", "part_number": "CK-V7-VC7222-G" };</script> </div> <div id="product-page-content"> <h1 class="xs-mt0 xs-mb2">Virtex-7 FPGA VC7222 Characterization Kit</h1> <div class="xs-mb3"><span class="bold xs-mr1">Manufactured By:</span>XILINX</div> <div class="xs-flex md-flex-row xs-flex-column"> <div class="md-w40 xs-w100"> <div id="devtool-primary-image" class="devtool-primary-image-container fill-white"> <img src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x439_1579633556.png" class="devtool-image-devtool-0 xs-w100 xs-full-height fill-white obj-fit-contain xs-block" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x300_1579633556.png" class="devtool-image-devtool-1 xs-w100 xs-full-height fill-white obj-fit-contain xs-hide" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> <div class="xs-flex xs-flex-wrap xs-mt2"> <div class="devtool-thumbnail fill-white xs-border-lighter txt-center xs-mr1 xs-mb2"> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x439_1579633556.png" id="devtool-0" class="xs-w100 xs-full-height obj-fit-contain" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> <div class="devtool-thumbnail fill-white xs-border-lighter txt-center xs-mr1 xs-mb2"> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x300_1579633556.png" id="devtool-1" class="xs-w100 xs-full-height obj-fit-contain" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> </div> </div> <div class="md-w60 md-pl4 md-pl4 md-pt0 xs-w100 xs-pl0 xs-pl0 xs-pt2"> <div class="xs-flex xs-flex-justify-space-between xs-flex-align-center xs-border-lighter fill-white xs-p2"> <div class="xs-mt1 xs-mb1"> <div class="xs-text-5"><span class="bold xs-mr1">Part Number:</span><span id="part-number-value">CK-V7-VC7222-G</span></div> </div> <div class="xs-text-right xs-mr2"> <a id="e14-product-link-05f2c" data-at-areainteracted="design-center" data-at-type="click" data-at-link-type="button" href="https://referral.element14.com/OrderCodeView?fsku=2802757&nsku=42AC9919&COM=e14c-noscript&CMP=e14c-noscript&osetc=e14-noscript-tracking-loss" data-at-label="PRODUCT_POPUP_OPEN"class="e14-embedded e14_shopping-cart-far e14-button" onclick="event.preventDefault();e14.func.displayProduct(e14.meta.user.country, this, 'embedded-link', e14.func.getProductLinkJSON('05f2c'));" data-farnell="2802757" data-newark="42AC9919" data-comoverride="" data-cmpoverride="" data-cpc="" data-avnetemea="" data-avnetema="" data-avnetasia="" >Buy Now</a> </div> </div> </div> </div> <div class="xs-mt3"> The kit provides the hardware environment for characterizing and evaluating the GTH and GTZ transceivers available on the Virtex-7 XC7VH580T-G2HCG1155E FPGA while allowing evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using the Vivado&reg; Design Suite. Each GTH and GTZ Quad and its associated reference clock are routed from the FPGA to SMA and Samtec BullsEye connector. A cable containing a BullsEye connector and standard SMA connectors allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment. Each BullsEye connector handles a full GTH or GTZ Quad, four transmit/receive pairs, enabling the highest level of flexibility in testing custom applications. Find out more and see what is included in the kit. </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Features</h3> <ul> <li>Hardware environment for characterizing and evaluating the GTH and GTZ transceivers on Virtex-7 VH580T FPGAs</li> <li>Hardware, design tools, IP, and pre-verified reference designs</li> <li>Integrated Bit Error Ratio Test (IBERT) reference design</li> <li>System ACE&trade; SD controller</li> <li>Expand I/O with 2 FPGA Mezzanine Card (FMC) interface</li> <li>BullsEye connector supporting a full GTH or GTZ Quad, with four transmit/receive pairs</li> <li>Six Samtec BullsEye connector pads for the GTH transceivers and reference clocks</li> <li>Two Samtec BullsEye connector pads for the GTZ transceivers and reference clocks</li> <li>Two pairs of differential MRCC inputs with SMA connectors</li> </ul> <h3 class="toc-item xs-pb2 xs-border-bottom">Ships With</h3> <ul> <li>Evaluation Board XC7VH580T-G2HCG1155E</li> <li>Samtec Bullseye Cable</li> <li>USB Cable</li> <li>Vivado Design</li> <li>Superclock2 Module</li> </ul> <div id="devtool-required-devtools-section" class="xs-hide"> <h3 class="toc-item xs-pb2 xs-mb1 xs-border-bottom">Required Tools</h3> <div id="devtool-required-devtools-content"></div> </div> <div id="devtool-accessory-devtools-section" class="xs-hide"> <h3 class="toc-item xs-pb2 xs-mb1 xs-border-bottom">Accessory Tools</h3> <div id="devtool-accessory-devtools-content"></div> </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Documents</h3> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">Quick Start Guide</h4> <div class="attachment xs-mb3"> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/support/documentation/boards_and_kits/vc7222/2015_1/ug971-vc7222-ibert-gsg.pdf" target="_blank">Virtex-7 FPGA VC7222 Characterization Kit IBERT Getting Started Guide (pdf)</a> </div> </div> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">User Manual/Guide</h4> <div class="attachment xs-mb3"> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/support/documentation/boards_and_kits/vc7222/ug965-vc7222-gth-gtz-char-board-ug.pdf" target="_blank">Virtex-7 FPGA VC7222 GTH and GTZ Transceiver Characterization Board User Guide (pdf)</a> </div> </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Downloads</h3> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">Schematics/Layout Files</h4> <div class="attachment "> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=345410&amp;filename=xtp304-vc7222-schematic-rev-c.pdf" target="_blank">VC7222 Schematics PDF (Rev. C) (pdf)</a> </div> <div class="attachment "> <i class="fal fa-file-archive"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=345412&amp;filename=xtp305-vc7222-allegro-board-rev-c.zip" target="_blank">VC7222 Allegro Board PDF (Rev. C) (zip)</a> </div> <div class="attachment xs-mb3"> <i class="fal fa-file-archive"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=195577&amp;filename=sclk2-allegro-board-xtp256-rev1-0.zip" target="_blank">SuperClock2 Allegro Board PDF (Rev 1.0) (zip)</a> </div> </div> </div> <div style="clear:both;"></div> <div style="font-size: 90%;">Tags: xilinx, primary_platforms, fpga, mcu, Virtex, Characterization Kit, development_platforms_kits, VC7222</div> https://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kit/revision/2Thu, 16 Dec 2021 03:28:11 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:0b7ae308-1b40-42f5-b707-fea19fff4d33e14-publisherhttps://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kit#commentsRevision 2 posted to Documents by e14-publisher on 12/16/2021 3:28:11 AM<br /> <div class="xs-hide"> <script>e14.meta.page.devtools={"id": 4947, "type": "devtool", "part_number": "CK-V7-VC7222-G" };</script> </div> <div id="product-page-content"> <h1 class="xs-mt0 xs-mb2">Virtex-7 FPGA VC7222 Characterization Kit</h1> <div class="xs-mb3"><span class="bold xs-mr1">Manufactured By:</span>XILINX</div> <div class="xs-flex md-flex-row xs-flex-column"> <div class="md-w40 xs-w100"> <div id="devtool-primary-image" class="devtool-primary-image-container fill-white"> <img src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x439_1579633556.png" class="devtool-image-devtool-0 xs-w100 xs-full-height fill-white obj-fit-contain xs-block" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x300_1579633556.png" class="devtool-image-devtool-1 xs-w100 xs-full-height fill-white obj-fit-contain xs-hide" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> <div class="xs-flex xs-flex-wrap xs-mt2"> <div class="devtool-thumbnail fill-white xs-border-lighter txt-center xs-mr1 xs-mb2"> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x439_1579633556.png" id="devtool-0" class="xs-w100 xs-full-height obj-fit-contain" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> <div class="devtool-thumbnail fill-white xs-border-lighter txt-center xs-mr1 xs-mb2"> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x300_1579633556.png" id="devtool-1" class="xs-w100 xs-full-height obj-fit-contain" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> </div> </div> <div class="md-w60 md-pl4 md-pl4 md-pt0 xs-w100 xs-pl0 xs-pl0 xs-pt2"> <div class="xs-flex xs-flex-justify-space-between xs-flex-align-center xs-border-lighter fill-white xs-p2"> <div class="xs-mt1 xs-mb1"> <div class="xs-text-5"><span class="bold xs-mr1">Part Number:</span><span id="part-number-value">CK-V7-VC7222-G</span></div> </div> <div class="xs-text-right xs-mr2"> <a id="e14-product-link-149eb" data-at-areainteracted="design-center" data-at-type="click" data-at-link-type="button" href="javascript:void(0)" data-at-label="PRODUCT_POPUP_OPEN"class="e14-embedded e14_shopping-cart-far e14-button" onclick="event.preventDefault();e14.func.displayProduct(e14.meta.user.country, this, 'embedded-link', e14.func.getProductLinkJSON('149eb'));" data-farnell="" data-newark="" data-comoverride="" data-cmpoverride="" data-cpc="" data-avnetemea="" data-avnetema="" data-avnetasia="" >Buy Now</a> </div> </div> </div> </div> <div class="xs-mt3"> The kit provides the hardware environment for characterizing and evaluating the GTH and GTZ transceivers available on the Virtex-7 XC7VH580T-G2HCG1155E FPGA while allowing evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using the Vivado&reg; Design Suite. Each GTH and GTZ Quad and its associated reference clock are routed from the FPGA to SMA and Samtec BullsEye connector. A cable containing a BullsEye connector and standard SMA connectors allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment. Each BullsEye connector handles a full GTH or GTZ Quad, four transmit/receive pairs, enabling the highest level of flexibility in testing custom applications. Find out more and see what is included in the kit. </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Features</h3> <ul> <li>Hardware environment for characterizing and evaluating the GTH and GTZ transceivers on Virtex-7 VH580T FPGAs</li> <li>Hardware, design tools, IP, and pre-verified reference designs</li> <li>Integrated Bit Error Ratio Test (IBERT) reference design</li> <li>System ACE&trade; SD controller</li> <li>Expand I/O with 2 FPGA Mezzanine Card (FMC) interface</li> <li>BullsEye connector supporting a full GTH or GTZ Quad, with four transmit/receive pairs</li> <li>Six Samtec BullsEye connector pads for the GTH transceivers and reference clocks</li> <li>Two Samtec BullsEye connector pads for the GTZ transceivers and reference clocks</li> <li>Two pairs of differential MRCC inputs with SMA connectors</li> </ul> <h3 class="toc-item xs-pb2 xs-border-bottom">Ships With</h3> <ul> <li>Evaluation Board XC7VH580T-G2HCG1155E</li> <li>Samtec Bullseye Cable</li> <li>USB Cable</li> <li>Vivado Design</li> <li>Superclock2 Module</li> </ul> <div id="devtool-required-devtools-section" class="xs-hide"> <h3 class="toc-item xs-pb2 xs-mb1 xs-border-bottom">Required Tools</h3> <div id="devtool-required-devtools-content"></div> </div> <div id="devtool-accessory-devtools-section" class="xs-hide"> <h3 class="toc-item xs-pb2 xs-mb1 xs-border-bottom">Accessory Tools</h3> <div id="devtool-accessory-devtools-content"></div> </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Documents</h3> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">Quick Start Guide</h4> <div class="attachment xs-mb3"> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/support/documentation/boards_and_kits/vc7222/2015_1/ug971-vc7222-ibert-gsg.pdf" target="_blank">Virtex-7 FPGA VC7222 Characterization Kit IBERT Getting Started Guide (pdf)</a> </div> </div> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">User Manual/Guide</h4> <div class="attachment xs-mb3"> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/support/documentation/boards_and_kits/vc7222/ug965-vc7222-gth-gtz-char-board-ug.pdf" target="_blank">Virtex-7 FPGA VC7222 GTH and GTZ Transceiver Characterization Board User Guide (pdf)</a> </div> </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Downloads</h3> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">Schematics/Layout Files</h4> <div class="attachment "> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=345410&amp;filename=xtp304-vc7222-schematic-rev-c.pdf" target="_blank">VC7222 Schematics PDF (Rev. C) (pdf)</a> </div> <div class="attachment "> <i class="fal fa-file-archive"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=345412&amp;filename=xtp305-vc7222-allegro-board-rev-c.zip" target="_blank">VC7222 Allegro Board PDF (Rev. C) (zip)</a> </div> <div class="attachment xs-mb3"> <i class="fal fa-file-archive"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=195577&amp;filename=sclk2-allegro-board-xtp256-rev1-0.zip" target="_blank">SuperClock2 Allegro Board PDF (Rev 1.0) (zip)</a> </div> </div> </div> <div style="clear:both;"></div> <div style="font-size: 90%;">Tags: xilinx, primary_platforms, fpga, mcu, Virtex, Characterization Kit, development_platforms_kits, VC7222</div> https://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kit/revision/1Mon, 18 Oct 2021 20:29:57 GMT93d5dcb4-84c2-446f-b2cb-99731719e767:0b7ae308-1b40-42f5-b707-fea19fff4d33e14-publisherhttps://community.element14.com/products/devtools/product-pages/w/documents/22928/virtex-7-fpga-vc7222-characterization-kit#commentsRevision 1 posted to Documents by e14-publisher on 10/18/2021 8:29:57 PM<br /> <div class="xs-hide"> <script>e14.meta.page.devtools={"id": 4947, "type": "devtool", "part_number": "CK-V7-VC7222-G" };</script> </div> <div id="product-page-content"> <h1 class="xs-mt0 xs-mb2">Virtex-7 FPGA VC7222 Characterization Kit</h1> <div class="xs-mb3"><span class="bold xs-mr1">Manufactured By:</span>XILINX</div> <div class="xs-flex md-flex-row xs-flex-column"> <div class="md-w40 xs-w100"> <div id="devtool-primary-image" class="devtool-primary-image-container fill-white"> <img src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x439_1579633556.png" class="devtool-image-devtool-0 xs-w100 xs-full-height fill-white obj-fit-contain xs-block" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x300_1579633556.png" class="devtool-image-devtool-1 xs-w100 xs-full-height fill-white obj-fit-contain xs-hide" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> <div class="xs-flex xs-flex-wrap xs-mt2"> <div class="devtool-thumbnail fill-white xs-border-lighter txt-center xs-mr1 xs-mb2"> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x439_1579633556.png" id="devtool-0" class="xs-w100 xs-full-height obj-fit-contain" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> <div class="devtool-thumbnail fill-white xs-border-lighter txt-center xs-mr1 xs-mb2"> <img loading="lazy" src="https://community-dc-assets.element14.com/images/devtool/size500/virtex7_fpga_vc7222_characterization_kit_500x300_1579633556.png" id="devtool-1" class="xs-w100 xs-full-height obj-fit-contain" alt="Virtex-7 FPGA VC7222 Characterization Kit" /> </div> </div> </div> <div class="md-w60 md-pl4 md-pl4 md-pt0 xs-w100 xs-pl0 xs-pl0 xs-pt2"> <div class="xs-flex xs-flex-justify-space-between xs-flex-align-center xs-border-lighter fill-white xs-p2"> <div class="xs-mt1 xs-mb1"> <div class="xs-text-5"><span class="bold xs-mr1">Part Number:</span><span id="part-number-value">CK-V7-VC7222-G</span></div> </div> <div class="xs-text-right xs-mr2"> <a id="e14-product-link-62559" data-at-areainteracted="rte-content" data-at-type="click" data-at-link-type="button" href="https://referral.element14.com/OrderCodeView?fsku=2802757&nsku=42AC9919&COM=e14c-noscript&CMP=e14c-noscript&osetc=e14-noscript-tracking-loss" data-at-label="PRODUCT_POPUP_OPEN"class="e14-embedded e14_shopping-cart-far e14-button" onclick="event.preventDefault();e14.func.displayProduct(e14.meta.user.country, this, 'embedded-link', e14.func.getProductLinkJSON('62559'));" data-farnell="2802757" data-newark="42AC9919" data-comoverride="" data-cmpoverride="" data-cpc="" data-avnetemea="" data-avnetema="" data-avnetasia="" >Buy Now</a> </div> </div> </div> </div> <div class="xs-mt3"> The kit provides the hardware environment for characterizing and evaluating the GTH and GTZ transceivers available on the Virtex-7 XC7VH580T-G2HCG1155E FPGA while allowing evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using the Vivado&reg; Design Suite. Each GTH and GTZ Quad and its associated reference clock are routed from the FPGA to SMA and Samtec BullsEye connector. A cable containing a BullsEye connector and standard SMA connectors allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment. Each BullsEye connector handles a full GTH or GTZ Quad, four transmit/receive pairs, enabling the highest level of flexibility in testing custom applications. Find out more and see what is included in the kit. </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Features</h3> <ul> <li>Hardware environment for characterizing and evaluating the GTH and GTZ transceivers on Virtex-7 VH580T FPGAs</li> <li>Hardware, design tools, IP, and pre-verified reference designs</li> <li>Integrated Bit Error Ratio Test (IBERT) reference design</li> <li>System ACE&trade; SD controller</li> <li>Expand I/O with 2 FPGA Mezzanine Card (FMC) interface</li> <li>BullsEye connector supporting a full GTH or GTZ Quad, with four transmit/receive pairs</li> <li>Six Samtec BullsEye connector pads for the GTH transceivers and reference clocks</li> <li>Two Samtec BullsEye connector pads for the GTZ transceivers and reference clocks</li> <li>Two pairs of differential MRCC inputs with SMA connectors</li> </ul> <h3 class="toc-item xs-pb2 xs-border-bottom">Ships With</h3> <ul> <li>Evaluation Board XC7VH580T-G2HCG1155E</li> <li>Samtec Bullseye Cable</li> <li>USB Cable</li> <li>Vivado Design</li> <li>Superclock2 Module</li> </ul> <div id="devtool-required-devtools-section" class="xs-hide"> <h3 class="toc-item xs-pb2 xs-mb1 xs-border-bottom">Required Tools</h3> <div id="devtool-required-devtools-content"></div> </div> <div id="devtool-accessory-devtools-section" class="xs-hide"> <h3 class="toc-item xs-pb2 xs-mb1 xs-border-bottom">Accessory Tools</h3> <div id="devtool-accessory-devtools-content"></div> </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Documents</h3> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">Quick Start Guide</h4> <div class="attachment xs-mb3"> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/support/documentation/boards_and_kits/vc7222/2015_1/ug971-vc7222-ibert-gsg.pdf" target="_blank">Virtex-7 FPGA VC7222 Characterization Kit IBERT Getting Started Guide (pdf)</a> </div> </div> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">User Manual/Guide</h4> <div class="attachment xs-mb3"> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/support/documentation/boards_and_kits/vc7222/ug965-vc7222-gth-gtz-char-board-ug.pdf" target="_blank">Virtex-7 FPGA VC7222 GTH and GTZ Transceiver Characterization Board User Guide (pdf)</a> </div> </div> <h3 class="toc-item xs-pb2 xs-border-bottom">Downloads</h3> <div class="xs-px2"> <h4 class="xs-pb2 xs-border-bottom">Schematics/Layout Files</h4> <div class="attachment "> <i class="fal fa-file-pdf"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=345410&amp;filename=xtp304-vc7222-schematic-rev-c.pdf" target="_blank">VC7222 Schematics PDF (Rev. C) (pdf)</a> </div> <div class="attachment "> <i class="fal fa-file-archive"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=345412&amp;filename=xtp305-vc7222-allegro-board-rev-c.zip" target="_blank">VC7222 Allegro Board PDF (Rev. C) (zip)</a> </div> <div class="attachment xs-mb3"> <i class="fal fa-file-archive"></i> <a href="https://www.xilinx.com/member/forms/download/design-license.html?cid=195577&amp;filename=sclk2-allegro-board-xtp256-rev1-0.zip" target="_blank">SuperClock2 Allegro Board PDF (Rev 1.0) (zip)</a> </div> </div> </div> <div style="clear:both;"></div> <div style="font-size: 90%;">Tags: xilinx, primary_platforms, fpga, mcu, Virtex, Characterization Kit, development_platforms_kits, VC7222</div>