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<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/"><channel><title>Altera Stratix FPGA Series Overview</title><link>https://community.element14.com/products/devtools/technicallibrary/w/documents/10124/altera-stratix-fpga-series-overview</link><description /><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>Altera Stratix FPGA Series Overview</title><link>https://community.element14.com/products/devtools/technicallibrary/w/documents/10124/altera-stratix-fpga-series-overview</link><pubDate>Wed, 27 Jun 2012 00:21:34 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:aa74a2ba-ca20-4019-bb96-f48a707ee0cb</guid><dc:creator>atomar</dc:creator><comments>https://community.element14.com/products/devtools/technicallibrary/w/documents/10124/altera-stratix-fpga-series-overview#comments</comments><description>Current Revision posted to Documents by atomar on 6/27/2012 12:21:34 AM&lt;br /&gt;
&lt;div&gt; &lt;/div&gt;&lt;table border="0" cellpadding="3" cellspacing="0" class="jiveNoBorder" style="border:0px solid #000000;width:100%;"&gt;&lt;tbody&gt;&lt;tr&gt;&lt;td style="border:0px solid black;border:0px solid #000000;font-family:arial, helvetica, sans-serif;background-color:transparent;padding:3px;text-align:left;color:#333333;"&gt;&lt;a href="/products/devtools/technicallibrary/w/documents/9958/altera-overview"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/300x300/__key/communityserver-wikis-components-files/00-00-00-01-46/7610.contentimage_5F00_17995.png"&gt;&lt;img alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/46/7610.contentimage_17995.png-300x300.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=H7p1R57vpIN5K8POZ1BiIerUPNBxCfz6MzCcGESnfNc%3D&amp;amp;se=2026-05-03T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=0xxM9V+0oQ3P0klT3jK8Qg==" style="max-height: 300px;max-width: 300px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/a&gt;&lt;/td&gt;&lt;td style="border:0px solid black;border:0px solid #000000;text-align:center;font-family:arial, helvetica, sans-serif;background-color:transparent;padding:3px;color:#333333;"&gt;&lt;strike style="text-align:right;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/300x300/__key/communityserver-wikis-components-files/00-00-00-01-46/5556.contentimage_5F00_17996.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/46/5556.contentimage_17996.png-300x300.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=Ry7LXea6pdKtQ7QJZUn9GPqFTj0Z4tBmkdFM4ZiwrEU%3D&amp;amp;se=2026-05-03T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=WzhvIYclS0VAIw+sd/qu/g==" style="max-height: 300px;max-width: 300px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/strike&gt;&lt;/td&gt;&lt;td style="border:0px solid black;border:0px solid #000000;text-align:right;font-family:arial, helvetica, sans-serif;background-color:transparent;padding:3px;color:#333333;"&gt;&lt;a href="/products/devtools/technicallibrary/w/documents/9456/development-kit-line-card---altera"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/300x300/__key/communityserver-wikis-components-files/00-00-00-01-46/3312.contentimage_5F00_17997.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/46/3312.contentimage_17997.png-300x300.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=9X1QRLbr903nkyNODKPUtauq0xl1drMWYLI%2FSs8X5gk%3D&amp;amp;se=2026-05-03T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=mDTQtb8mdt+yJ4pF8Q8Jig==" style="max-height: 300px;max-width: 300px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/a&gt;&lt;/td&gt;&lt;/tr&gt;&lt;/tbody&gt;&lt;/table&gt;&lt;hr /&gt;&lt;p style="margin:0;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/150x36/__key/communityserver-wikis-components-files/00-00-00-01-46/6545.contentimage_5F00_17998.jpg"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/46/6545.contentimage_17998.jpg-150x36.jpg?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=ey3BSgWJ5oNI218TMSX7U%2FdnizNeax0nHG547Hc4bUM%3D&amp;amp;se=2026-05-03T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=E7z6am5sD9AQfi7xflDuqQ==" style="max-height: 36px;max-width: 150px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/p&gt;&lt;h2&gt;&lt;strong&gt;Stratix FPGA Series&lt;/strong&gt;&lt;/h2&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p style="margin:0;"&gt;The Stratix&lt;span class="emoticon" data-url="https://community.element14.com/cfs-file/__key/system/emoji/00ae.svg" title="Registered"&gt;&amp;#x00ae;&lt;/span&gt; FPGA series enables you to deliver high-performance, state-of-the-art products to market faster with lower risk and higher productivity. By combining high density, high performance, and a rich feature set, Stratix series FPGAs allow you to integrate more functions and maximize system bandwidth. &lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;table border="1" cellpadding="3" cellspacing="0" class="jiveBorder" style="border:1px solid #000000;width:100%;"&gt;&lt;thead&gt;&lt;tr&gt;&lt;th style="border:1px solid black;border:1px solid #000000;font-family:arial, helvetica, sans-serif;padding:3px;text-align:-webkit-center;background-color:#6690bc;color:#333333;"&gt;&lt;span style="color:#ffffff;"&gt;&lt;strong&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/th&gt;&lt;th style="border:1px solid black;border:1px solid #000000;font-family:arial, helvetica, sans-serif;padding:3px;text-align:-webkit-center;background-color:#6690bc;color:#333333;"&gt;&lt;span style="color:#ffffff;"&gt;&lt;strong&gt;&lt;a class="jive-link-wiki-small" href="/products/devtools/technicallibrary/w/documents/10118/altera-stratix-fpga-architecture-overview"&gt;&lt;span style="color:#ffffff;"&gt;Stratix&lt;/span&gt;&lt;/a&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/th&gt;&lt;th style="border:1px solid black;border:1px solid #000000;font-family:arial, helvetica, sans-serif;padding:3px;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;span style="color:#ffffff;"&gt;&lt;strong&gt;&lt;span style="color:#ffffff;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;strong&gt;Stratix GX&lt;/strong&gt;&lt;/span&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/th&gt;&lt;th style="border:1px solid black;border:1px solid #000000;font-family:arial, helvetica, sans-serif;padding:3px;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;span style="color:#ffffff;"&gt;&lt;strong&gt;&lt;span style="color:#ffffff;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;strong&gt;Stratix II&lt;/strong&gt;&lt;/span&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/th&gt;&lt;th style="border:1px solid black;border:1px solid #000000;font-family:arial, helvetica, sans-serif;padding:3px;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;span style="color:#ffffff;"&gt;&lt;strong&gt;&lt;span style="color:#ffffff;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;strong&gt;Stratix II GX&lt;/strong&gt;&lt;/span&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/th&gt;&lt;th style="border:1px solid black;border:1px solid #000000;font-family:arial, helvetica, sans-serif;padding:3px;text-align:-webkit-center;background-color:#6690bc;color:#333333;"&gt;&lt;span style="color:#ffffff;"&gt;&lt;strong&gt;&lt;span style="color:#ffffff;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;strong&gt;Stratix&lt;/strong&gt;&lt;/span&gt; III&lt;br /&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/th&gt;&lt;th style="border:1px solid black;border:1px solid #000000;font-family:arial, helvetica, sans-serif;padding:3px;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;span style="color:#ffffff;"&gt;&lt;strong&gt;&lt;span style="color:#ffffff;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;strong&gt;&lt;a class="jive-link-wiki-small" href="/products/devtools/technicallibrary/w/documents/10125/altera-stratix-iv-fpga-architecture-overview"&gt;&lt;span style="color:#ffffff;"&gt;Stratix IV&lt;/span&gt;&lt;/a&gt;&lt;/strong&gt;&lt;/span&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/th&gt;&lt;th style="border:1px solid black;border:1px solid #000000;font-family:arial, helvetica, sans-serif;padding:3px;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;span style="color:#ffffff;"&gt;&lt;strong&gt;&lt;span style="color:#ffffff;text-align:-webkit-center;background-color:#6690bc;"&gt;&lt;strong&gt;Stratix V&lt;/strong&gt;&lt;/span&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/span&gt;&lt;/th&gt;&lt;/tr&gt;&lt;/thead&gt;&lt;tbody&gt;&lt;tr&gt;&lt;td style="border:1px solid black;border:1px solid #000000;background-color:transparent;padding:3px;text-align:left;color:#000000;"&gt;&lt;span style="color:#000000;"&gt;Year Introduced&lt;/span&gt;&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;2002&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;2003&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;2004&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;2005&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;2006&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;2008&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;2010&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:left;background-color:transparent;padding:3px;color:#000000;"&gt;&lt;span style="color:#000000;"&gt;Process Technology&lt;/span&gt;&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;130 nm&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;&lt;span style="color:#000000;"&gt;130 nm&lt;/span&gt;&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;90 nm&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;90 nm&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;65 nm&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;&lt;span style="color:#000000;"&gt;40 nm&lt;/span&gt;&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;&lt;span style="color:#000000;"&gt;28 nm&lt;/span&gt;&lt;/td&gt;&lt;/tr&gt;&lt;tr&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:left;background-color:transparent;padding:3px;color:#000000;"&gt;&lt;span style="color:#000000;"&gt;Recommended for New Designs&lt;/span&gt;&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;Yes&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;Yes&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;Yes&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;Yes&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;Yes&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;&lt;span style="color:#000000;"&gt;Yes&lt;/span&gt;&lt;/td&gt;&lt;td style="border:1px solid black;border:1px solid #000000;text-align:center;background-color:transparent;padding:3px;color:#000000;"&gt;&lt;span style="color:#000000;"&gt;Yes&lt;/span&gt;&lt;/td&gt;&lt;/tr&gt;&lt;/tbody&gt;&lt;/table&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;&lt;a class="jive-link-wiki-small" href="/products/devtools/technicallibrary/w/documents/10118/altera-stratix-fpga-architecture-overview"&gt;Stratix&lt;/a&gt; FPGA &lt;/strong&gt;have HardCopy&lt;span class="emoticon" data-url="https://community.element14.com/cfs-file/__key/system/emoji/00ae.svg" title="Registered"&gt;&amp;#x00ae;&lt;/span&gt; ASIC equivalent devices. HardCopy ASICs provide a path to low-cost volume production with low risk through FPGA prototyping of your design. Stratix series FPGAs are also ideal for the prototyping and verification of standard-cell ASICs.&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Stratix V FPGAs&lt;/strong&gt; provide the highest bandwidth, highest levels of system integration, and ultimate flexibility of any 28-nm FPGA. The device family includes variants with backplane-compatible, chip-to-chip, and chip-to-module capable 14.1-Gbps (GS and GX) and chip-to-chip and chip-to-module 28G (GT) transceivers, 950K logic elements (LEs), and up to 3,926 variable-precision digital signal processing (DSP) blocks.&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;&lt;a class="jive-link-wiki-small" href="/products/devtools/technicallibrary/w/documents/10125/altera-stratix-iv-fpga-architecture-overview"&gt;Stratix IV&lt;/a&gt; FPGAs&lt;/strong&gt; provide the highest density, highest performance, and lowest power of any 40-nm FPGA. With enhanced (E) and enhanced with transceivers (GX and GT) variants, Stratix IV FPGAs address many markets and applications, such as wireless and wireline communications, military, and broadcast. This high-performance 40-nm FPGA family includes the best-in-class 11.3-Gbps transceivers.&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Stratix III FPGAs&lt;/strong&gt; are the industry&amp;#39;s lowest power high-performance 65-nm FPGAs. Logic rich (L) and enhanced for memory and digital signal processing (E) variants allow you to balance your resource requirements to your design without having to design in a device any bigger than is absolutely necessary - saving board real estate, compilation time, and money. Stratix III FPGAs target high-end core system processing designs in many applications.&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;Stratix II FPGAs&lt;/strong&gt; and the Stratix II GX variants introduced the adaptive logic module (ALM) architecture, which uses a high-performance, 8-input fracturable look-up table (LUT) in place of a 4-input LUT. You&amp;#39;ll find this innovative ALM logic structure used in Altera&amp;#39;s newest high-end FPGAs. Stratix II and Stratix II GX FPGAs are available in volume and are still highly recommended for new designs.&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;&lt;a class="jive-link-wiki-small" href="/products/devtools/technicallibrary/w/documents/10118/altera-stratix-fpga-architecture-overview"&gt;Stratix&lt;/a&gt; FPGAs and the Stratix GX&lt;/strong&gt; variants are the original members of the Altera&lt;span class="emoticon" data-url="https://community.element14.com/cfs-file/__key/system/emoji/00ae.svg" title="Registered"&gt;&amp;#x00ae;&lt;/span&gt; Stratix FPGA series. This high-performance FPGA family introduced digital signal processing hard intellectual property (IP) blocks along with Altera&amp;#39;s ubiquitous TriMatrix on-chip memory and flexible I/O structures.&lt;/p&gt;&lt;p style="margin:0;"&gt;&lt;strong&gt;&lt;br /&gt;&lt;/strong&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;p style="margin:0;text-align:right;"&gt;&lt;a class="jive-link-anchor-small" href="#top"&gt;Back to top&lt;/a&gt;&lt;/p&gt;&lt;p style="margin:0;padding:0px;"&gt;&amp;nbsp;&lt;/p&gt;&lt;hr /&gt;&lt;table border="0" cellpadding="3" cellspacing="0" class="jiveNoBorder" style="border:0px solid #000000;width:100%;"&gt;&lt;tbody&gt;&lt;tr&gt;&lt;td style="border:0px solid black;border:0px solid #000000;font-family:arial, helvetica, sans-serif;background-color:transparent;padding:3px;text-align:left;color:#333333;"&gt;&lt;a href="/products/devtools/technicallibrary/w/documents/9958/altera-overview"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/300x300/__key/communityserver-wikis-components-files/00-00-00-01-46/0763.contentimage_5F00_17999.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/46/0763.contentimage_17999.png-300x300.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=trkLu385QnX00ppJSJChKX%2B8c8EwobK0Ww6qCc75pMI%3D&amp;amp;se=2026-05-03T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=0xxM9V+0oQ3P0klT3jK8Qg==" style="max-height: 300px;max-width: 300px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/a&gt;&lt;/td&gt;&lt;td style="border:0px solid black;border:0px solid #000000;text-align:center;font-family:arial, helvetica, sans-serif;background-color:transparent;padding:3px;color:#333333;"&gt;&lt;strike style="text-align:right;"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/300x300/__key/communityserver-wikis-components-files/00-00-00-01-46/0172.contentimage_5F00_18000.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/46/0172.contentimage_18000.png-300x300.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=Yn7CEfv3Djshcwy%2BYPQZPqzi%2Bjs48DlCRCYSDlVDnNo%3D&amp;amp;se=2026-05-03T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=WzhvIYclS0VAIw+sd/qu/g==" style="max-height: 300px;max-width: 300px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/strike&gt;&lt;/td&gt;&lt;td style="border:0px solid black;border:0px solid #000000;text-align:right;font-family:arial, helvetica, sans-serif;background-color:transparent;padding:3px;color:#333333;"&gt;&lt;a href="/products/devtools/technicallibrary/w/documents/9456/development-kit-line-card---altera"&gt;&lt;span&gt;&lt;a href="https://community.element14.com/resized-image/__size/300x300/__key/communityserver-wikis-components-files/00-00-00-01-46/4314.contentimage_5F00_18001.png"&gt;&lt;img loading="lazy" alt="image" src="https://community-storage.element14.com/communityserver-components-secureimagefileviewer/communityserver/wikis/components/files/00/00/00/01/46/4314.contentimage_18001.png-300x300.png?sv=2016-05-31&amp;amp;sr=b&amp;amp;sig=LIZ2bV%2FYZRSFxacjylFsQrpvKTt1vkOPLow9KPxvLX8%3D&amp;amp;se=2026-05-03T23%3A59%3A59Z&amp;amp;sp=r&amp;amp;_=mDTQtb8mdt+yJ4pF8Q8Jig==" style="max-height: 300px;max-width: 300px;" /&gt;&lt;/a&gt;&lt;/span&gt;&lt;/a&gt;&lt;/td&gt;&lt;/tr&gt;&lt;/tbody&gt;&lt;/table&gt;&lt;hr /&gt;&lt;div style="clear:both;"&gt;&lt;/div&gt;
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