element14 Lattice presents HDR 60 Video Development Kit

atomar — Wed, 05 Sep 2012 06:29:09 GMT

Current Revision posted to Documents by atomar on 9/5/2012 6:29:09 AM

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Kit Overview

Technical Documents

Video

Features

Kit Contents

Overview

Lattice and element14 together presents LatticeECP3-70 FPGA based the Lattice HDR-60 Video Camera Development KitLattice HDR-60 Video Camera Development Kit, it's fully production ready High Dynamic Range (HDR) camera, designed to fit into commercially available camera housings. The hardware is designed to support full 1080p resolution at 60 frames per second in streaming mode through the FPGA, without the need for any external frame buffer.

The integrated 'IONOS' Image Signal Processing (ISP) IP pipeline from Lattice partner, Helion GmbH, provides end-to-end ISP support from sensor to displayable image, and incorporates sensor interfacing, defective pixel correction & 2D noise reduction, high quality 5 x 5 DeBayer, Color Correction Matrix, Fast Auto Exposure, Auto White Balance, HDR, Gamma Correction and Overlay (both character and graphics). Lattice HDMI PHY IP enables output to HDMI/DVI monitors. The kit provides the industry’s fastest Auto-Exposure, very high quality Auto White Balance and HDR greater than 120dB. On board Broadcom Broadreach™ PHY enables support for Ethernet over coax up to a run length of 700 meters. The hardware supports up to 16-megapixel sensors, can support up to 2 sensors simultaneously and is easily programmable via standard low-cost USB cable.

This kit gives the jump start to manufacturer and developers in their FPGA-based high definition camera programs by providing a high quality HDR Video Camera reference design engineered to minimize system BOM, while addressing both legacy infrastructure and future-proofing the customer’s investment. With full 1080p60 support and the ability to scale up to 16MP sensors, as well as support for Ethernet over coaxial cable, the Lattice HDR-60 Development Kit offers nearly twice the functionality at less than half the price of any comparable kit currently available.

The LatticeECP3 FPGA family is comprised of the lowest power, SERDES-enabled FPGAs in the market today. The family’s five FPGAs offer standards-compliant, multi-protocol 3.2G SERDES, DDR1/2/3 memory interfaces and high performance, cascadable DSP slices that are ideal for RF, baseband and image signal processing. Toggling at 1Gbps, the LatticeECP3 FPGAs also feature fast LVDS I/O as well as embedded memory of up to 6.8 Mbits. Logic density varies from 17K LUTs to 149K LUTs with up to 586 user I/O.

Key Applications: High volume cost- and Power-sensitive video camera and display, Wireline and wireless infrastructure applications.

Technical Documents

Learning Center

Type	Description
User Guide	Lattice: User's Guide for HDR-60 Video Camera Development Kit
User Guide	Lattice: User's Guide for NanoVesta Head Board
User Guide	Lattice: Quick Start Guide for HDR-60 Video Camera Development Kit
Datasheet	Lattice: Datasheet for LatticeECP3 Family
Product Brief	Lattice: LatticeECP3 Family Product Brochure
Product Brief	Lattice: Product Brief for HDR-60 Video Camera Development Kit

Design Elements

Type	Description
BOM	Lattice: BOM List for HDR-60 Video Camera Development Kit (Rev A )
BOM	Lattice: BOM List for NanoVesta Head Board (Rev A)
Layout	Lattice: PCB Layout for HDR-60 Video Camera Development Kit (Rev A)
Layout	Lattice: PCB Photoplot for HDR-60 Video Camera Development Kit (Rev A)
Layout	Lattice: PCB Layout for NanoVesta Head Board (Rev A)
Layout	Lattice: PCB Photoplot for NanoVesta Head Board (Rev A)
Schematic	Lattice: Schematic for HDR-60 Video Camera Development Kit (Rev A )
Schematic	Lattice: Schematic for NanoVesta Head Board (Rev A )

Video

www.youtube.com/watch

Kit Features

The Lattice HDR-60 Video Camera Development KitLattice HDR-60 Video Camera Development Kit includes the following features:

FPGA-based Image Signal Processing
Fully Production-Ready HDR Camera Design
1080p Capable @ 60 frames per second
Supports up to 16 Megapixel Sensors Supports up to two sensors simultaneously
Full 60fps in streaming mode needs no external frame buffer
Fast Auto Exposure Instantly Adjust to Changing Light
Greater than 120 dB High Dynamic Range (HDR) Performance
Direct HDMI / DVI output from FPGA
Extremely Low-Latency
Comprehensive Image Processing IP Library
On-board Broadcom® BroadreachTM PHY Enables IP over Coax
On-board FTDI Chip provides easy programming via low cost USB cable

The Lattice HDR-60 Video Camera development Kit offers several benefits:

Features	Benefits
Fully Production ReadyFree Demo Bit-stream, Schematics & Layout Fits Commercially Available Camera Housings	Accelerated Time to Market
Lowest Cost BOM for FPGA-based 1080p60 HDR CameraNeeds No External Frame Buffer	Full HD Functionality and HDR at Lowest System Cost
Industry Leading Sensor Roadmap Support: up to 16MP	Future-proof Kit Investment
Industry Leading:- Auto Exposure - Auto White Balance - 120dB+ HDR Range	Differentiation at Low System Cost
Available, Comprehensive Wishbone Compliant ISP Library	Versatile Product Offering with Single Source, fully-compatible IP
Broadcom BroadReach™ PHY and BNC Connector	Legacy Cable Infrastructure Support Coax-ready for up to 700m Signal Travel
ECP3-70 On Board FTDI Chip On Board RJ45 Ethernet Connector On Board	Room to add additional IP / Customer’s own IP. Easy Programming via regular USB Cable
On Board Twin-Sensor Support Connectors	Video Stitching Applications Support

Kit Contents

The Lattice HDR-60 Video Camera Development KitLattice HDR-60 Video Camera Development Kit contains everything needed to develop and run a range of applications:

HDR-60 Base Board with LatticeECP3 FPGA, pre-loaded with ISP Demo
NanoVesta Head Board with Aptina A-1000 720p HDR Sensor and Sunex lens
Two USB cables HDMI cable with HDMI-to-DVI adapter
12V AC adapter pow

Tags: latticeecp3, hdr-60_video_camera_development_kit, fpga