ARM11 Overview

atomar — Wed, 27 Jun 2012 00:40:37 GMT

Current Revision posted to Documents by atomar on 6/27/2012 12:40:37 AM

ARM11 Overview

The ARM11™ processor family provides the engine that powers many smartphones in production today; it is also widely used in consumer, home, and embedded applications. It delivers extreme low power and a range of performance from 350 MHz in small area designs up to 1 GHz in speed optimized designs in 45 and 65 nm. ARM11 processor software is compatible with all previous generations of ARM processors, and introduces 32-bit SIMD for media processing, physically tagged caches to improve OS context switch performance, TrustZone for hardware-enforced security, and tightly coupled memories for real-time applications.

ARM11 Processor Family Features

Powerful ARMv6 instruction set architecture
ARM Thumb® instruction set reduces memory bandwidth and size requirements by up to 35%
ARM Jazelle® technology for efficient embedded Java execution
ARM DSP extensions
SIMD (Single Instruction Multiple Data) media processing extensions deliver up to 2x performance for video processing
ARM TrustZone® technology for on-chip security foundation (ARM1176JZ-S and ARM1176JZF-S processors)
Thumb-2 technology (ARM1156(F)-S only) for enhanced performance, energy efficiency and code density
Low power consumption:
0.21 mW/MHz (65G) including cache controllers
Energy saving power-down modes address static leakage currents in advanced processes
High performance integer processor
8-stage integer pipeline delivers high clock frequency (9 stages for ARM1156T2(F)-S)
Separate load-store and arithmetic pipelines
Branch Prediction and Return Stack
High performance memory system design
Supports 4-64k cache sizes
Optional tightly coupled memories with DMA for multi-media applications
High-performance 64-bit memory system speeds data access for media processing and networking applications
ARMv6 memory system architecture accelerates OS context-switch
Vectored interrupt interface and low-interrupt-latency mode speeds interrupt response and real-time performance
Optional Vector Floating Point coprocessor for automotive/industrial controls and 3D graphics acceleration (ARM1136JF-S, ARM1176JZF-S and ARM1156T2F-S processors)
All ARM11 family processors are delivered as ARM-Synopsys Reference Methodology compliant deliverables which significantly reduce the time to generate a specific technology implementation of the core and to generate a complete set of industry standard views and models.

Tags: arm11