<?xml-stylesheet type="text/xsl" href="https://community.element14.com/cfs-file/__key/system/syndication/rss.xsl" media="screen"?><rss version="2.0" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:slash="http://purl.org/rss/1.0/modules/slash/" xmlns:wfw="http://wellformedweb.org/CommentAPI/"><channel><title>Introducing the AMD Spartan™︎ UltraScale+™︎ FPGAs for Secure, Low-power, High I/O Count Applications</title><link>/products/manufacturers/amd/b/blog/posts/amd-spartan-ultrascale-fpgas</link><description>Introduction
Embedded design engineers have always faced tough choices. With an ever-increasing population of devices and sensors connected at the edge, the need has never been higher for secure devices capable of handling a high IO count, as well as</description><dc:language>en-US</dc:language><generator>Telligent Community 12</generator><item><title>RE: Introducing the AMD Spartan™︎ UltraScale+™︎ FPGAs for Secure, Low-power, High I/O Count Applications</title><link>https://community.element14.com/products/manufacturers/amd/b/blog/posts/amd-spartan-ultrascale-fpgas</link><pubDate>Thu, 10 Jul 2025 00:02:46 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:5c9be7f7-dadc-426a-a11b-ff19e949c931</guid><dc:creator>bhfletcher</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;The first three devices in the Spartan UltraScale+ family are in volume production! This includes the SU10P, SU25P, and SU35P. These smaller devices do not have transceivers or the hardened memory controller, but they do have the new security and configuration features, as well as 200-300 I/Os!&amp;nbsp;&lt;/p&gt;
&lt;p&gt;&lt;a href="https://www.amd.com/en/blogs/2025/spartan-ultrascale-plus-fpgas-in-production.html" rel="noopener noreferrer nofollow" target="_blank" data-e14adj="t"&gt;www.amd.com/.../spartan-ultrascale-plus-fpgas-in-production.html&lt;/a&gt;&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29034&amp;AppID=186&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Introducing the AMD Spartan™︎ UltraScale+™︎ FPGAs for Secure, Low-power, High I/O Count Applications</title><link>https://community.element14.com/products/manufacturers/amd/b/blog/posts/amd-spartan-ultrascale-fpgas</link><pubDate>Sun, 06 Jul 2025 06:38:16 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:5c9be7f7-dadc-426a-a11b-ff19e949c931</guid><dc:creator>embeddedguy</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;Nice Article.&amp;nbsp;&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29034&amp;AppID=186&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item><item><title>RE: Introducing the AMD Spartan™︎ UltraScale+™︎ FPGAs for Secure, Low-power, High I/O Count Applications</title><link>https://community.element14.com/products/manufacturers/amd/b/blog/posts/amd-spartan-ultrascale-fpgas</link><pubDate>Wed, 02 Jul 2025 18:07:24 GMT</pubDate><guid isPermaLink="false">93d5dcb4-84c2-446f-b2cb-99731719e767:5c9be7f7-dadc-426a-a11b-ff19e949c931</guid><dc:creator>venkat01</dc:creator><slash:comments>0</slash:comments><description>&lt;p&gt;There are some interesting changes with the configuration and boot architecture for the Spartan Ultrascale+ FPGAs with the Platform Management Controller and using the Programmable Device Image ( .pdi) file instead of the .bit file, making the boot process more robust and secure.&lt;/p&gt;
&lt;p&gt;&lt;img alt=" " src="/resized-image/__size/1280x720/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-5c9be7f7-dadc-426a-a11b-ff19e949c931/pastedimage1751479552229v2.png" /&gt;&lt;/p&gt;&lt;img src="https://community.element14.com/aggbug?PostID=29034&amp;AppID=186&amp;AppType=Weblog&amp;ContentType=0" width="1" height="1"&gt;</description></item></channel></rss>