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ANO008: Disinfection with UV-C LEDs

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Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1, 74638 Waldenburg, Germany

Tel.: +49 (0) 7942 / 945 – 0

ANE004: REDFIT IDC SKEDD – Debugging & Firmware-Upload

Tags: technologies, ultraviolet, material, uv-c leds, Application Notes, app note, disinfection

ANE004: REDFIT IDC SKEDD Connector

Würth Elektronik — Mon, 03 Jan 2022 10:40:37 GMT

Revision 3 posted to Documents by Würth Elektronik on 1/3/2022 10:40:37 AM

APPLICATION NOTE

REDFIT IDC SKEDD Connector

A new connection for debug and firmware-upload

ANE004 BY DANIEL KÜBLER IN COOPERATION WITH GÜNTHER KLENNER FROM

1 Connection of debugger and micro-controller

During development, the connection between the debugger and a micro-controller is important to upload firmware, validating codes or finding mistakes. Even during production of small and mid-size series this connection is used for uploading firmware after mounting. Commonly a box-header is mounted on the PCB to connect the debugger. But mostly this component is single used only and needs space, build height and money. Not only the cost of the part itself has to be considered, as there are purchasing- and production-processes generating costs as well. But an initial connection is necessary to bring the firmware to the micro-controller. For high volume production MCUs are programmed before mounting, but for small and midrange quantities it is not economic in terms of costs as well. Würth Elektronik now provides a solution perfect to use even for small series.

Figure 1: Würth Elektronik REDFIT IDC SKEDD Connector

2 Debugger connection without boxheader

Würth Elektroniks` new REDFIT IDC SKEDD connector is directly connected to the PCB by hand without the need of a counterpart. Means no extra costs for component, processing or purchasing. There´s even no space needed above the PCB, which benefits the housing designer. Nonetheless the connector provides secure connection without any additional tool. Thereby debugging of the firmware can be easily processed after production. Two differently sized plastic pegs protect the REDFIT IDC SKEDD against polarity reversal. This safety feature prevents damaging the debugger as well as the micro-controller. Another interesting feature: The plastic pegs are longer as the contacts. Therefore no shortcuts can occur by touching the board on wrong position or below mounting plate.

3 2-Wire Debugger

Most of the micro-controllers provide the possibility of a two wire debugging. For ARM MCUs it´s named Wire-Debug, for TI-MSP430 SpyBi-Wire but even other MCU showing this feature nowadays. Thereby only two pins of the MCU instead of five (JTAG) are used for debugging. Means three pins can be used for the application. A great benefit as mostly the micro-controller never have enough pins (by customer wish). Additionally the connector and PCB can be realized in a smaller form factor. Certainly two additional lines are needed for power supply, so it ends up with a 4-wire connection finally. The following graphics show the four lines in a schematic of TI-MSP430:

Figure 2: Debug-lines and power supply in TI-MSP430 schematic (Source: TI MSP430 – Hardware Tools User´s Guide Lit-No: SLAU278)

4 REDFIT IDC as 4-Pin Debug Plug

First tests performed with MPSP430G2553 show all advantages named above. The space needed for the connection could be integrated between the components:

Figure 3: Layout and required space on the PCB

Used pinning:

1 = Vcc

2 = Clock

3 = Data (Reset)

4 = GND

Figure 4: Pinning of REDFIT IDC SKEDD as debug-connector

Due to the used pinning the current carrying lines are maximum spread and enables a specific reset when shorting pin 3 and 4. The REDFIT IDC SKEDD connects properly without any wiggling. A flexible 4-wire flat wire leads securely to the debugger:

Figure 5: REDFIT IDC SKEDD during debugging

5 Conclusion

The new WE REDFIT IDC SKEDD connector fits perfectly for debug connections. Both in design stage and for small and midsize volume production. It´s a secure, performed by hand connection without any need of a counterpart.

IMPORTANT NOTICE

The Application Note is based on our knowledge and experience of typical requirements concerning these areas. It serves as general guidance and should not be construed as a commitment for the suitability for customer applications by Würth Elektronik eiSos GmbH & Co. KG. The information in the Application Note is subject to change without notice. This document and parts thereof must not be reproduced or copied without written permission, and contents thereof must not be imparted to a third party nor be used for any unauthorized purpose. Würth Elektronik eiSos GmbH & Co. KG and its subsidiaries and affiliates (WE) are not liable for application assistance of any kind. Customers may use WE’s assistance and product recommendations for their applications and design. The responsibility for the applicability and use of WE Products in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate and investigate, where appropriate, and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not. The technical specifications are stated in the current data sheet of the products. Therefore the customers shall use the data sheets and are cautioned to verify that data sheets are current. The current data sheets can be downloaded at www.we-online.com. Customers shall strictly observe any product-specific notes, cautions and warnings. WE reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services. WE DOES NOT WARRANT OR REPRESENT THAT ANY LICENSE, EITHER EXPRESS OR IMPLIED, IS GRANTED UNDER ANY PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS IN WHICH WE PRODUCTS OR SERVICES ARE USED. INFORMATION PUBLISHED BY WE REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE A LICENSE FROM WE TO USE SUCH PRODUCTS OR SERVICES OR A WARRANTY OR ENDORSEMENT THEREOF. WE products are not authorized for use in safety-critical applications, or where a failure of the product is reasonably expected to cause severe personal injury or death. Moreover, WE products are neither designed nor intended for use in areas such as military, aerospace, aviation, nuclear control, submarine, transportation (automotive control, train control, ship control), transportation signal, disaster prevention, medical, public information network etc. Customers shall inform WE about the intent of such usage before design-in stage. In certain customer applications requiring a very high level of safety and in which the malfunction or failure of an electronic component could endanger human life or health, customers must ensure that they have all necessary expertise in the safety and regulatory ramifications of their applications. Customers acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of WE products in such safetycritical applications, notwithstanding any applications-related information or support that may be provided by WE. CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES ARISING OUT OF THE USE OF WE PRODUCTS IN SUCH SAFETY-CRITICAL APPLICATIONS.

USEFUL LINKS

Application Notes www.we-online.com/appnotes

REDEXPERT Design Plattform www.we-online.com/redexpert

Produkt Catalog www.we-online.com/products

CONTACT INFORMATION

Tel. +49 7942 945 - 0

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1 ⋅ 74638 Waldenburg ⋅ Germany

ANE004: REDFIT IDC SKEDD – Debugging & Firmware-Upload

Tags: connectors, firmware, debug, redfit, connector_application, Application Notes, wurth_elektronik

ANE004: REDFIT IDC SKEDD Connector

Würth Elektronik — Mon, 03 Jan 2022 10:39:05 GMT

Revision 2 posted to Documents by Würth Elektronik on 1/3/2022 10:39:05 AM

APPLICATION NOTE

REDFIT IDC SKEDD Connector

A new connection for debug and firmware-upload

ANE004 BY DANIEL KÜBLER IN COOPERATION WITH GÜNTHER KLENNER FROM

1 Connection of debugger and micro-controller

Figure 1: Würth Elektronik REDFIT IDC SKEDD Connector

2 Debugger connection without boxheader

3 2-Wire Debugger

Figure 2: Debug-lines and power supply in TI-MSP430 schematic (Source: TI MSP430 – Hardware Tools User´s Guide Lit-No: SLAU278)

4 REDFIT IDC as 4-Pin Debug Plug

First tests performed with MPSP430G2553 show all advantages named above. The space needed for the connection could be integrated between the components:

Figure 3: Layout and required space on the PCB

Used pinning:

1 = Vcc

2 = Clock

3 = Data (Reset)

4 = GND

Figure 4: Pinning of REDFIT IDC SKEDD as debug-connector

Figure 5: REDFIT IDC SKEDD during debugging

5 Conclusion

IMPORTANT NOTICE

USEFUL LINKS

Application Notes www.we-online.com/appnotes

REDEXPERT Design Plattform www.we-online.com/redexpert

Produkt Catalog www.we-online.com/products

CONTACT INFORMATION

Tel. +49 7942 945 - 0

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1 ⋅ 74638 Waldenburg ⋅ Germany

ANE004: REDFIT IDC SKEDD – Debugging & Firmware-Upload

Tags: connectors, firmware, debug, redfit, connector_application, Application Notes, wurth_elektronik

ANE004: REDFIT IDC SKEDD Connector

Würth Elektronik — Mon, 03 Jan 2022 10:37:56 GMT

Revision 1 posted to Documents by Würth Elektronik on 1/3/2022 10:37:56 AM

APPLICATION NOTE

REDFIT IDC SKEDD Connector

A new connection for debug and firmware-upload

ANE004 BY DANIEL KÜBLER IN COOPERATION WITH GÜNTHER KLENNER FROM

1 Connection of debugger and micro-controller

Figure 1: Würth Elektronik REDFIT IDC SKEDD Connector

2 Debugger connection without boxheader

3 2-Wire Debugger

Figure 2: Debug-lines and power supply in TI-MSP430 schematic (Source: TI MSP430 – Hardware Tools User´s Guide Lit-No: SLAU278)

4 REDFIT IDC as 4-Pin Debug Plug

First tests performed with MPSP430G2553 show all advantages named above. The space needed for the connection could be integrated between the components:

Figure 3: Layout and required space on the PCB

Used pinning:

1 = Vcc

2 = Clock

3 = Data (Reset)

4 = GND

Figure 4: Pinning of REDFIT IDC SKEDD as debug-connector

Figure 5: REDFIT IDC SKEDD during debugging

5 Conclusion

IMPORTANT NOTICE

USEFUL LINKS

Application Notes www.we-online.com/appnotes

REDEXPERT Design Plattform www.we-online.com/redexpert

Produkt Catalog www.we-online.com/products

CONTACT INFORMATION

Tel. +49 7942 945 - 0

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1 ⋅ 74638 Waldenburg ⋅ Germany

Langzeitlagerfähigkeit von Bauelementen, Baugruppen und Geräten (zvei.org)

SN019: Afraid of aging? The effects of time on electrolytic capacitors

Würth Elektronik — Mon, 20 Dec 2021 12:45:10 GMT

Current Revision posted to Documents by Würth Elektronik on 12/20/2021 12:45:10 PM

Support Note

Afraid of aging? The effects of time on electrolytic capacitors

SN019 BY FRANK PUHANE

1 Introduction

Since the development and production of electrolytic capacitors, designers have had to deal with the issues of aging and shelf life of these products. Electrolytic capacitors have been around for a very long time, but the rapid increase did not occur until the 1960s. There are still many "myths" from that time that revolve around the aging and shelf life of these capacitors. The main problem of that time was the materials available, which had a much lower quality standard than the materials used today. Aging is distinguished between the following changes in the capacitor performance: Change in capacitance, ESR and leakage current during operation (with voltage applied) and reduction of dielectric strength due to degradation of the dielectric (no voltage applied). There is also a guideline from the ZVEI on the long-term storage capability of components: During storage of an aluminum electrolytic capacitor, two different effects can adversely affect the blocking (insulation) capability of the capacitor, oxide degeneration and post-impregnation effects. If voltage is applied to the capacitor after a longer storage time, this can initially cause an increased regeneration leakage current. Shortly after a DC voltage is applied, the leakage current is relatively high and asymptotically decreases to a low leakage current after some minutes. After the aluminum electrolytic capacitors have been mounted on the printed circuit board, the increased leakage currents must be taken into account, e.g. in the first startup of the device, and the electrolytic capacitor must be given time to regenerate. If these effects cannot be compensated, the electrolytic capacitor must be reformed before assembly. [1] Forming is a special process to oxidize the anode electrode (i.e. aluminum oxide). However, why do these effects occur? These and other questions will addressed in this document.

2 Background Information

Due to the polar or non-symmetrical structure of an electrolytic capacitor, the electrodes are divided into anode and cathode. In an electrolytic capacitor, the anode consists of a processed metal foil and the conductive electrolyte forms the actual cathode. An oxide layer on the metal foil of the anode is used as the dielectric (insulation) between the two conductive electrodes. This oxide layer insulates the electrodes from each other. The thickness of this oxide layer changes repeatedly during the production process and during storage without voltage. It constantly decreases. This increases the leakage current of the capacitor. Electrolytic capacitors are differentiated in their construction based on two essential criteria. These are the electrode material used (such as tantalum or niobium) and the property of the electrolyte. The electrolyte can be liquid or solid. By specifying the relative permittivity of the different dielectrics, it is clear that the capacitance achieved per volume depends strongly on the dielectric used. This shows Figure 1.

Figure 1: Overview of the electrode materials and the associated dielectrics

The aluminum electrolytic and aluminum polymer capacitor are wound capacitors. The terminal pins bonded to the respective metal foil by a special process. The paper layer shown in Figure 2, which also referred to as the separator, finally completely impregnated with the electrolyte and in addition to storing the electrolyte, has the function of physically separating the metal foils, electrically insulating them and protecting them from damage. The electrode foil is often mistaken for the cathode, but the electrode foil only provides the electrical connection to the actual cathode, the electrolyte.

Figure 2: Structure of an electrolytic capacitor

A special electrochemical process called forming creates the oxide layer. In this process, the oxide layer is created by applying the so-called forming voltage. The stronger the oxide layer is, the higher the voltage that can handled by this layer. After this process, a very slow degradation of this oxide layer begins if no voltage is applied. The longer the capacitor is voltage-free, the thinner the oxide layer becomes and consequently the dielectric strength decreases. This results also in an increase of the leakage current. As soon as voltage is applied again, the oxide layer is rebuilt, the leakage current decreases and the dielectric strength returns to the normal level. However, never as after the initial production. The forming voltage can be up to 30% higher than the actual nominal voltage of the capacitor. This means that the oxide layer is also up to 30% thicker. The resulting thickness of the oxide layer is proportional to the applied voltage (Figure 3: Aluminum foil with oxide layer). The anode foil is either rougher or smoother, depending on the intended use.

Figure 3: Aluminum foil with oxide layer

2.1 What happens during operation with applied voltage?

Electrolytic capacitors are used everywhere in electronics. Due to the applied voltage a certain temperature profile will be established at the capacitor, with a higher temperature in the core of the element and respectively lower on the surface. Several aspects, the heat generated by components as well as the heat from the surrounding, influence the ambient temperature. Other factors such as ripple current and frequency also play a role in calculating the expected life. The simple relationship between expected life and operating temperature is defined by the Arrhenius equation.

(1)

with L_nom = defined endurance, T₀ = upper temperature limit, T_A = application temperature. Depending on the conditions under which the capacitor is operated, the amount of electrolyte is reduced by self-healing of the oxide layer (e.g. damage due to overvoltage), dry out or by diffusion through the sealing rubber.

2.2 What happens during voltage-free storage?

The storage conditions of electrolytic capacitors are defined in the data sheet. These conditions are temperature between 5 °C and 35 °C with a humidity between 10% and 75%. The quality of the oxide layer can deteriorate during storage without externally applied voltage, especially at higher temperatures. Since in this case there is no leakage current and as a result, the oxide layer will not regenerate. This leads to a higher leakage current flow when a voltage applied after prolonged storage. If a capacitor is exposed to high humidity for a long period, this can cause discoloration of the terminals (i.e. oxidation) and lead to poor solderability. The average storage conditions at Würth Elektronik are temperature = 22.48 °C and humidity = 37.51%. The storage capability of the capacitor is defined by the so-called shelf life. Please see Table 1 for information that is more detailed. The shelf life simulates the aging of the capacitor under the influence of temperature without an electrical load (voltage, current). The electrical parameters of the capacitor subsequently measured again after formation and at a room temperature of 20 °C.

Table 1: Example test conditions for Endurance and Shelf Life for SMD electrolytic capacitors

2.3 What is oxide degeneration?

The ZVEI guide describes oxide degradation as follows: Depending on the electrolyte class and temperature, ionic components of the electrolyte can diffuse into the dielectric or oxide and change the oxide crystal structure. Electrical defects and ionic charge carriers are formed in the oxide. [1] Electrolytes based on the solvent glycol have an increased leakage current. The advantage of this electrolyte is its ability to repair defects in the oxide layer when current flows through the capacitor. As a result, these electrolytes are mainly used in high-voltage aluminum electrolytic capacitors. In the low-voltage range, the oxide layer is more homogeneous, so electrolytes containing the solvent gammabutyrolactone are used here. This solvent produces a reliable and voltageresistant oxide layer. An advantage of gamma-butyrolactone is that this solvent almost incapable of penetrate the oxide layer. As a result, a long voltage-free storage can be achieved, since the oxide layer is still well insulating even after a long time. If a measurement of the leakage current shows temporarily increased values after a long period of voltage-free storage, this is due to the post-impregnation effects.

2.4 What are post impregnation effects?

The ZVEI guide describes the post-impregnation effects as follows: The oxide can only be electrochemically formed in the component where it is also covered with electrolyte and electrically connected to the cathode foil via the electrolyte. This means that the necessary forming current can flow at these points. This is the case in a new capacitor for more than 99.9% of the oxide area to be formed. [1] In the case of low-voltage aluminum electrolytic capacitors with solvent electrolytes such as gammabutyrolactone, it is assumed that the oxide layer has formed in all areas of the anode foil in accordance with the applied forming voltage and has not degraded by the time the capacitor is used for the first time. It is therefore expected that these capacitors will have a very low leakage current. In principle, the post-impregnation effects also occur with high-voltage aluminum electrolytic capacitors, but they are negligible because the effects of oxide degradation are dominant. Nevertheless, forming can be an advantage, since forming makes the oxide layer more stable and thus reduces the resulting leakage current (albeit minimal).

3 Countermeasures and measurements

Ethylene glycol and gamma-butyrolactoneIm electrolytes are used in Würth Elektronik products. These have different properties. Due to the fact, that the thickness of the oxide layer change by time, a longer storage without voltage can increase the capacitance and reduce the ESR. The leakage current provides a reliable basis for determining the condition of the oxide layer. By applying the nominal voltage via a 10 kΩ resistor, the oxide layer of the dielectric stabilizes; the dielectric strength and the leakage current stabilize to the initial level. The leakage current decreases after applying a voltage. In the data sheet, leakage currents given are after typically 120 seconds. Diagram 1 shows the leakage current over 2 min. with applied nominal voltage (UR = 10 VDC and ILEAKmax = 100 µA after 2 min.

Figure 4: Average leakage current of 10 capacitor, measured over 2 minutes

Furthermore, Würth Elektronik has established the so-called "Electrical Property Check" to check the electrical parameters of electrolytic capacitors. Data available on request. To show how the properties of the capacitors change over time, we measured the electrical properties of an aluminum electrolytic and aluminum polymer capacitor after five years of storage. Figure 5, 6 and 7 shows the measurement results for the aluminum electrolytic capacitor and Figure 8, 9 and 10 shows the measurement result for the aluminum polymer capacitor.

Figure 5: Capacitance of five samples after five years of storage. Nominal capacitance is 1000 µF (aluminum electrolytic capacitor)

Figure 6: Dissipation factor of five samples after five years of storage. Maximum specified DF is 9% (aluminum electrolytic capacitor)

Figure 7: Leakage current of five samples after five years of storage. Maximum specified leakage current is 630 µA (aluminum electrolytic capacitor)

Figure 8: Capacitance of five samples after five years of storage. Nominal capacitance is 47 µF (aluminum polymer capacitor)

Figure 9: Leakage current of five samples after five years of storage. Maximum specified leakage current is 559 µA (aluminum polymer capacitor)

Figure 10: Dissipation factor of five samples after five years of storage. Maximum specified DF is 12% (aluminum polymer capacitor)

Another point that influences the shelf life is the solderability of the components. A longer storage time can change the wettability of the solder connections and have an influence on the process ability of the components. All aspects described in this document describe physical effects as they occur to any capacitor of the respective technology. This information is for general information and does not represent a data sheet extension.

4 Conclusion

Capacitors, similar to many other components have a certain lifetime with a changing performance over the time. The change in the performance is very much dependent of the quality of the material used, the storage conditions before used in an application and the position on the PCB. The placement of the component can influence the entire expected lifetime of the application. The temperature on the surface and in the core of the component largely defines the lifetime. This temperature can rise above the defined temperatures in the application due to a hotspot or it can be kept at a defined level through active cooling. More information about aluminum electrolytic and aluminum polymer capacitors can be found in Application Note ANP071. More information specifically on the topic of expected lifetime can be found in Support Note SN008. By proper handling and adherence to the specifications defined in the data sheet, the electrolytic capacitor can be a reliable and long-lasting component. The loss of capacitance and the increase of the ESR during operation is compensated by a well thought-out dimensioning of the component. Prolonged voltage-free storage is also possible. Regardless of whether the capacitors are stored in their original packaging or already mounted the degradation of the oxide layer and the resulting reduction in the maximum voltage that the capacitor can dissipate must be taken into account. The increased leakage current at the moment of switch-on must be tolerated by the application so that a frictionless start is possible. An upstream formation of the capacitors is also possible. The data sheet provides a detailed description of this.

A Appendix

A.1 Literature

[1] ZVEI Leitfaden Langzeitlagerfähigkeit von Bauelementen, Baugruppen und Geräten Leitfaden

IMPORTANT NOTICE

The Application Note is based on our knowledge and experience of typical requirements concerning these areas. It serves as general guidance and should not be construed as a commitment for the suitability for customer applications by Würth Elektronik eiSos GmbH & Co. KG. The information in the Application Note is subject to change without notice. This document and parts thereof must not be reproduced or copied without written permission, and contents thereof must not be imparted to a third party nor be used for any unauthorized purpose. Würth Elektronik eiSos GmbH & Co. KG and its subsidiaries and affiliates (WE) are not liable for application assistance of any kind. Customers may use WE’s assistance and product recommendations for their applications and design. The responsibility for the applicability and use of WE Products in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate and investigate, where appropriate, and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not. The technical specifications are stated in the current data sheet of the products. Therefore the customers shall use the data sheets and are cautioned to verify that data sheets are current. The current data sheets can be downloaded at www.we-online.com. Customers shall strictly observe any product-specific notes, cautions and warnings. WE reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services. WE DOES NOT WARRANT OR REPRESENT THAT ANY LICENSE, EITHER EXPRESS OR IMPLIED, IS GRANTED UNDER ANY PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS IN WHICH WE PRODUCTS OR SERVICES ARE USED. INFORMATION PUBLISHED BY WE REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE A LICENSE FROM WE TO USE SUCH PRODUCTS OR SERVICES OR A WARRANTY OR ENDORSEMENT THEREOF. WE products are not authorized for use in safety-critical applications, or where a failure of the product is reasonably expected to cause severe personal injury or death. Moreover, WE products are neither designed nor intended for use in areas such as military, aerospace, aviation, nuclear control, submarine, transportation (automotive control, train control, ship control), transportation signal, disaster prevention, medical, public information network etc. Customers shall inform WE about the intent of such usage before design-in stage. In certain customer applications requiring a very high level of safety and in which the malfunction or failure of an electronic component could endanger human life or health, customers must ensure that they have all necessary expertise in the safety and regulatory ramifications of their applications. Customers acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of WE products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by WE. CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES ARISING OUT OF THE USE OF WE PRODUCTS IN SUCH SAFETY-CRITICAL APPLICATIONS.

USEFUL LINKS

SN019 Afraid of aging? The effects of time on electrolytic capacitors

Application Notes www.we-online.com/appnotes

REDEXPERT Design Plattform www.we-online.com/redexpert

Produkt Catalog www.we-online.com/products

CONTACT INFORMATION

Tel. +49 7942 945 - 0

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1 ⋅ 74638 Waldenburg ⋅ Germany

Langzeitlagerfähigkeit von Bauelementen, Baugruppen und Geräten (zvei.org)

Tags: Aging, capacitors, electrolytic capacitors, support note, wurth_elektronik

SN019: Afraid of aging? The effects of time on electrolytic capacitors

Würth Elektronik — Mon, 20 Dec 2021 12:44:47 GMT

Revision 2 posted to Documents by Würth Elektronik on 12/20/2021 12:44:47 PM

Support Note

Afraid of aging? The effects of time on electrolytic capacitors

SN019 BY FRANK PUHANE

1 Introduction

2 Background Information

Figure 1: Overview of the electrode materials and the associated dielectrics

Figure 2: Structure of an electrolytic capacitor

Figure 3: Aluminum foil with oxide layer

2.1 What happens during operation with applied voltage?

(1)

2.2 What happens during voltage-free storage?

Table 1: Example test conditions for Endurance and Shelf Life for SMD electrolytic capacitors

2.3 What is oxide degeneration?

2.4 What are post impregnation effects?

3 Countermeasures and measurements

Figure 4: Average leakage current of 10 capacitor, measured over 2 minutes

Figure 5: Capacitance of five samples after five years of storage. Nominal capacitance is 1000 µF (aluminum electrolytic capacitor)

Figure 6: Dissipation factor of five samples after five years of storage. Maximum specified DF is 9% (aluminum electrolytic capacitor)

Figure 7: Leakage current of five samples after five years of storage. Maximum specified leakage current is 630 µA (aluminum electrolytic capacitor)

Figure 8: Capacitance of five samples after five years of storage. Nominal capacitance is 47 µF (aluminum polymer capacitor)

Figure 9: Leakage current of five samples after five years of storage. Maximum specified leakage current is 559 µA (aluminum polymer capacitor)

Figure 10: Dissipation factor of five samples after five years of storage. Maximum specified DF is 12% (aluminum polymer capacitor)

4 Conclusion

A Appendix

A.1 Literature

[1] ZVEI Leitfaden Langzeitlagerfähigkeit von Bauelementen, Baugruppen und Geräten Leitfaden

IMPORTANT NOTICE

The Application Note is based on our knowledge and experience of typical requirements concerning these areas. It serves as general guidance and should not be construed as a commitment for the suitability for customer applications by Würth Elektronik eiSos GmbH & Co. KG. The information in the Application Note is subject to change without notice. This document and parts thereof must not be reproduced or copied without written permission, and contents thereof must not be imparted to a third party nor be used for any unauthorized purpose. Würth Elektronik eiSos GmbH & Co. KG and its subsidiaries and affiliates (WE) are not liable for application assistance of any kind. Customers may use WE’s assistance and product recommendations for their applications and design. The responsibility for the applicability and use of WE Products in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate and investigate, where appropriate, and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not. The technical specifications are stated in the current data sheet of the products. Therefore the customers shall use the data sheets and are cautioned to verify that data sheets are current. The current data sheets can be downloaded at www.we-online.com. Customers shall strictly observe any product-specific notes, cautions and warnings. WE reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services. WE DOES NOT WARRANT OR REPRESENT THAT ANY LICENSE, EITHER EXPRESS OR IMPLIED, IS GRANTED UNDER ANY PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS IN WHICH WE PRODUCTS OR SERVICES ARE USED. INFORMATION PUBLISHED BY WE REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE A LICENSE FROM WE TO USE SUCH PRODUCTS OR SERVICES OR A WARRANTY OR ENDORSEMENT THEREOF. WE products are not authorized for use in safety-critical applications, or where a failure of the product is reasonably expected to cause severe personal injury or death. Moreover, WE products are neither designed nor intended for use in areas such as military, aerospace, aviation, nuclear control, submarine, transportation (automotive control, train control, ship control), transportation signal, disaster prevention, medical, public information network etc. Customers shall inform WE about the intent of such usage before design-in stage. In certain customer applications requiring a very high level of safety and in which the malfunction or failure of an electronic component could endanger human life or health, customers must ensure that they have all necessary expertise in the safety and regulatory ramifications of their applications. Customers acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of WE products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by WE. CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES ARISING OUT OF THE USE OF WE PRODUCTS IN SUCH SAFETY-CRITICAL APPLICATIONS.

USEFUL LINKS

SN019 Afraid of aging? The effects of time on electrolytic capacitors

Application Notes www.we-online.com/appnotes

REDEXPERT Design Plattform www.we-online.com/redexpert

Produkt Catalog www.we-online.com/products

CONTACT INFORMATION

Tel. +49 7942 945 - 0

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1 ⋅ 74638 Waldenburg ⋅ Germany

Langzeitlagerfähigkeit von Bauelementen, Baugruppen und Geräten (zvei.org)

Tags: Aging, capacitors, electrolytic capacitors, support note, wurth_elektronik

SN019: Afraid of aging? The effects of time on electrolytic capacitors

Würth Elektronik — Mon, 20 Dec 2021 12:44:02 GMT

Revision 1 posted to Documents by Würth Elektronik on 12/20/2021 12:44:02 PM

Support Note

Afraid of aging? The effects of time on electrolytic capacitors

SN019 BY FRANK PUHANE

1 Introduction

2 Background Information

Figure 1: Overview of the electrode materials and the associated dielectrics

Figure 2: Structure of an electrolytic capacitor

Figure 3: Aluminum foil with oxide layer

2.1 What happens during operation with applied voltage?

(1)

2.2 What happens during voltage-free storage?

Table 1: Example test conditions for Endurance and Shelf Life for SMD electrolytic capacitors

2.3 What is oxide degeneration?

2.4 What are post impregnation effects?

3 Countermeasures and measurements

Figure 4: Average leakage current of 10 capacitor, measured over 2 minutes

Figure 5: Capacitance of five samples after five years of storage. Nominal capacitance is 1000 µF (aluminum electrolytic capacitor)

Figure 6: Dissipation factor of five samples after five years of storage. Maximum specified DF is 9% (aluminum electrolytic capacitor)

Figure 7: Leakage current of five samples after five years of storage. Maximum specified leakage current is 630 µA (aluminum electrolytic capacitor)

Figure 8: Capacitance of five samples after five years of storage. Nominal capacitance is 47 µF (aluminum polymer capacitor)

Figure 9: Leakage current of five samples after five years of storage. Maximum specified leakage current is 559 µA (aluminum polymer capacitor)

Figure 10: Dissipation factor of five samples after five years of storage. Maximum specified DF is 12% (aluminum polymer capacitor)

4 Conclusion

A Appendix

A.1 Literature

[1] ZVEI Leitfaden Langzeitlagerfähigkeit von Bauelementen, Baugruppen und Geräten Leitfaden

IMPORTANT NOTICE

The Application Note is based on our knowledge and experience of typical requirements concerning these areas. It serves as general guidance and should not be construed as a commitment for the suitability for customer applications by Würth Elektronik eiSos GmbH & Co. KG. The information in the Application Note is subject to change without notice. This document and parts thereof must not be reproduced or copied without written permission, and contents thereof must not be imparted to a third party nor be used for any unauthorized purpose. Würth Elektronik eiSos GmbH & Co. KG and its subsidiaries and affiliates (WE) are not liable for application assistance of any kind. Customers may use WE’s assistance and product recommendations for their applications and design. The responsibility for the applicability and use of WE Products in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate and investigate, where appropriate, and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not. The technical specifications are stated in the current data sheet of the products. Therefore the customers shall use the data sheets and are cautioned to verify that data sheets are current. The current data sheets can be downloaded at www.we-online.com. Customers shall strictly observe any product-specific notes, cautions and warnings. WE reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services. WE DOES NOT WARRANT OR REPRESENT THAT ANY LICENSE, EITHER EXPRESS OR IMPLIED, IS GRANTED UNDER ANY PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS IN WHICH WE PRODUCTS OR SERVICES ARE USED. INFORMATION PUBLISHED BY WE REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE A LICENSE FROM WE TO USE SUCH PRODUCTS OR SERVICES OR A WARRANTY OR ENDORSEMENT THEREOF. WE products are not authorized for use in safety-critical applications, or where a failure of the product is reasonably expected to cause severe personal injury or death. Moreover, WE products are neither designed nor intended for use in areas such as military, aerospace, aviation, nuclear control, submarine, transportation (automotive control, train control, ship control), transportation signal, disaster prevention, medical, public information network etc. Customers shall inform WE about the intent of such usage before design-in stage. In certain customer applications requiring a very high level of safety and in which the malfunction or failure of an electronic component could endanger human life or health, customers must ensure that they have all necessary expertise in the safety and regulatory ramifications of their applications. Customers acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of WE products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by WE. CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES ARISING OUT OF THE USE OF WE PRODUCTS IN SUCH SAFETY-CRITICAL APPLICATIONS.

USEFUL LINKS

SN019 Afraid of aging? The effects of time on electrolytic capacitors

Application Notes www.we-online.com/appnotes

REDEXPERT Design Plattform www.we-online.com/redexpert

Produkt Catalog www.we-online.com/products

CONTACT INFORMATION

Tel. +49 7942 945 - 0

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1 ⋅ 74638 Waldenburg ⋅ Germany

Tags: Aging, capacitors, electrolytic capacitors, support note, wurth_elektronik

ANP085: Single Pair Ethernet for Industrial Applications

Würth Elektronik — Mon, 22 Nov 2021 14:25:58 GMT

Current Revision posted to Documents by Würth Elektronik on 11/22/2021 2:25:58 PM

Application Note: Single Pair Ethernet for Industrial Applications

ANP085 BY FABIAN VORNHAGEN, MARTIN LEIHENSEDER, ROBERT DEMHARTER, ISMAEL MOLINA ALBA, SIMON MARK, JAIRO BUSTOS, MATTHIAS FRITSCHE

1 Evolution of Ethernet - from 4 pairs to 1 single pair

Starting in the early 1980s as a communication protocol for computer networks, Ethernet and its associated standards has become the most used protocol in industry communication. Copper cables with 2-pairs for Fast Ethernet and 4-pairs cables for Gigabit Ethernet are the core elements in enterprise and industrial networks. With the new Single Pair Ethernet (SPE) technology driven from the car industry, many new use cases are possible to replace analog sensor applications or industrial bus systems.

Figure 1: IP20 version of the SPE connector acc. to IEC 63171-6

In 2019 about 59 % of all industrial communication protocols were based on LAN. Still, a high percentage of field bus systems like Profibus or CC-Link (Control and Communication) are in use as well. Many sensors or actuators inside production facilities don’t have a requirement for a high data rate. But as the distance between these devices and the field switches often is more than 200 m, Ethernet with a maximum cable length of 100 m comes to its limits.

Besides cable length, the (cable)weight, mechanical connector stability and PCB size reduction were the drivers to create a new standard beyond the RJ45 based multi-pair Ethernet. Single Pair Ethernet (SPE) was developed to fulfil these market requirements and enable borderless IP based communication from the cloud to any sensor or actuator.

This Application Note describes the components needed for Single Pair Ethernet from the cable to the PHY chip. The focus will be set for the right EMI filter design for 10BASE-T1L and 100BASE-T1 and to fulfil communication safety requirements according to IEC 62368-1. This will be demonstrated in a PCB to characterize the effectiveness of the components.

2 SPE -Hardware and components

The new SPE physical layer needs new components like cable connectors, magnetics, semiconductors and other devices. The international standards organisations and the allied companies for SPE have invested a lot of time and money in the last years to make all these parts available. The main standards are already publicly available. Also first components are ready to use and in this way the design of new devices with SPE connectivity is possible. The SPE electrical requirements are specified in the following IEEE standards:

IEEE 802.3cg (10BASE-T1) with bandwidth from 0.1 to 20 MHz and reach up to 1000 m.
IEEE 802.3bw (100BASE-T1) with bandwidth 0.3 to 66 MHz and reach up to 40 m.
IEEE 802.3bp, (1000BASE-T1) with bandwidth 1 to 600 MHz and reach up to 40 m.

2.1 Cable

Based on the needed transmission speed and link length, two basic types of SPE cables are available and standardized. For 10 Mbit/s networks of up to 1000 m cable length, the following standards specify the cable design:

IEC 61156-13 - SPE data cable up to 20 MHz bandwidth for fixed installation,
IEC 61156-14 - SPE data cable up to 20 MHz bandwidth for flexible installation.

For 1 Gbit/s networks up to 40 m these standards are available:

IEC 61156-11 - SPE data cable up to 600 MHz bandwidth for fixed installation,
IEC 61156-12 - SPE data cable up to 600 MHz bandwidth for flexible installation.

Compared to traditional Category 5e industrial Ethernet cables with four pairs for 1 GBit/s transmission, there is a significant reduction in space and weight of the cable. Please refer to table 1 for more details.

Table 1: Dimension comparison SPE cable

All these cables are shielded to provide the needed crosstalk resistance for the 40 m 1GBASE-T1 and the 1000 m 10BASE-T1L as demonstrated in figure 2.

Figure 2: Design for a typical SPE cable (1-copper wire, 2-wire isolation, 3-shielding foil, 4-shielding braid, 5-cable jacket)

Depending on the use case, different cable jacket materials are possible. The copper cross-section of the cable must be selected according to the needed link length and the Power over Data Line (PoDL) requirement. No. 26 AWG and 22 AWG wires are typically taken for link lengths of up to 20 m and 40 m, respectively. For longer link lengths up to 1.000 m, 16 AWG or 18 AWG cables must be used.

To realize the 1 Gbit/s transmission rate over a single pair, the standards define high electrical properties for an SPE cable. Those include the s-parameters insertion loss (IL), return loss (RL) and alien crosstalk (AXT) over a frequency range up to 600 MHz. Insertion loss describes the logarithmic ratio between power fed into the cable and the power transmitted trough the line. The high demands on IL are necessary to realize the long transmission distances of SPE.

Return loss and the impedance of the cable are important for the reflection behaviour of the overall system. Reflections are interferences on the line. Those interferences could disturb transmitters and receivers. To minimize the reflections, the overall SPE system should have the same characteristic impedance of 100 Ω and low RL values.

For cables with more than one pair, crosstalk describes the signals transmitted between the pairs over inductive and capacitive coupling. This crosstalk disturbs the actual transmission signals on the line. SPE has the advantage that there could be no crosstalk from other pairs, but SPE has to deal with alien crosstalk. ANEXT is crosstalk from other cables in the near enviorment. To protect the transmission from disturbing ANEXT industrial SPE cables should be well shielded with a combined foil and braid shield.

The foil shield provides a high shielding effectiveness against high frequency electromagnetic fields. The braided shield is used for mechanical stabilization and shielding of low frequency electromagnetic fields. The effect of a braid depends on the thickness of individual wires and on the degree of coverage. SPE cables for industrial environments should provide a coverage of a minimum 85 %. The braiding of a cable also mainly defines the values for the transfer impedance of a cable shielding.

The shielding effect of a cable works in both directions, which means that the shielding attenuation reduces both the radiation of disturbances of the cable signal as well as disturbances of other devices acting on the cable from outside.

2.2 Connector

For SPE completely new types of connectors are needed. These connectors are smaller compared to the typical RJ45 and offer the same robustness as the often used industrial style M12 D- and X-coded connectors. This new SPE interface is defined in the IEC 63171-6 standard and includes different M8 / M12 versions for very harsh industrial applications and an IP20 interface for in cabinet use cases (see figure 4). All these connector types are based on the same terminal inserts and use a robust pin and socket contact system. This modular design concept with identical terminal inserts in all versions allow the mating of IP20 plugs to IP65 / 67 jacks for testing or set up.

This SPE connector series is specified for 60 V DC / 4 A @ 60°C and fulfills the requirments for all Power over Data Line (PoDL) classes. For harsh industrial environments with a heavy EMC disturbance, the connector has a 360° shielding shell to provide the shielding connection from the cable shielding to the PCB with four shielding pins. These Through Hole Reflow (THR) solder pins also offer a robust connection between the jacks and the PCB (Figure 5).

Figure 3: Different recommended SPE connector acc. to IEC 63171-6

The connector mating face design is symmetrical and the contacts are arranged in parallel with the identical contact length. The RF compliant connector technology allows signal transmissions up to 1000BASE T1.

Figure 4: Identical length of the signal paths to avoid runtime differences of the signals

3 Filter Topologies

The MDI (Medium Dependent Interface) forms the connection between cable and the physical medium, the PHY chip, which generates bits from data signals and passes them on for further processing. The passive components of the MDI have various tasks, such as correct forwarding of data signals, signal interference suppression, electrical isolation or transport of electrical energy up to 60 W in the case of Power over Data Line (PoDL).

To ensure error-free data communication, limits for return loss and mode conversion loss have been defined in various IEEE 802.3 standards. Figure 6 illustrates the MDI limits for 10BASE-T1 according to IEEE 802.3cg and 100BASE-T1 according to IEEE 802.3bw.

Figure 5: Limits of return loss and mode conversion for the forMDI10BASE-T1 (black) and 100BASE-T1 (grey)

3.1 State of the art

Coming from the automotive sector, there are already finished circuit diagrams for Single Pair Ethernet for 100BASE-T1 with a common mode choke, two capacitors connected in parallel and a termination network for CM interference from the cable.

Figure 6: Single Pair Ethernet schematic for automotive Ethernet 100BASE-T1

The common mode choke not only provides filtering of interfering common mode signals, but also helps to improve mode conversion loss and return loss in certain frequency ranges. Due to the lower cut-off frequency at 100BASE-T1 of 1 MHz, the impedance of the choke must be high in low frequencies and, if possible, also cover higher frequencies up to 200 MHz. The number of windings and core size is correspondingly larger.

The matching network to ground (GND) typically consists of three resistors and one capacitor. The two 1 kΩ - resistors (R₁, R₂ in fig. 7) terminate the pair of wires balanced to ground and thus reduce interfering common mode signals. The 100 nF capacitor (C₃) with the 100 kΩ discharge resistor (R₃) ensures decoupling of direct currents.

The coupling capacitors have capacitances of typically 100 nF and come with 50 V isolation voltage. They are comparatively small and costeffective, which is why they are used in automotive applications with lowvoltage environments and a maximum cable length of 15 m.

3.2 Isolation requirements

Outside the automobile, the IEEE 802.3 standard for signaling systems stipulates the insulation requirement according to IEC 62368-1, which corresponds to 1500 V AC for 60 seconds. A DC voltage of 2250 VDC for 60 seconds or specific test voltage pulses are also permitted. These high insulation voltages cannot be maintained by the 50 V capacitors, so alternative solutions must be sought. The following section therefore describes a solution using a transformer. Detailed measurements and a comparison with capacitors with 2000 V insulation voltage follows in the section Performance Comparison SPE automotive vs. SPE industrial Solutions.

At 1 – 66 MHz, the frequency range for SPE 100BASE-T1 is in the Gigabit Multipair Ethernet (1 - 62.5 MHz) range. It is therefore obvious to design a circuit for SPE that is based on the circuit diagram of Gigabit Ethernet, see figure 8.

The central element of the circuit is a signal transformer, which provides the galvanic isolation and ideally does not influence the data signals. The transformer is terminated at its center pins with capacitors to GND. A common mode choke is used for common mode interference suppression. To ensure protection against ESD pulses, a TVS diode is placed between the common mode choke and the PHY chip. ESD suppression is even better if the TVS diode is located between the connector and the transformer. However, in order not to cause a short circuit between signal pins and GND during hipot tests, the diode must then be disconnected from GND during the test. Figure 8 illustrates the circuit.

Figure 7: SPE schematic with a transformer solution

The following section describes the individual components of the circuit in more detail.

3.3 Galvanic isolation with a transformer

For SPE a signal transmitter of the WE-STST series is selected. Its compact design compared to conventionally manufactured LAN transformers, together with high inductance of 350 µH, offers good signal characteristics even at lower frequencies. In addition, it is SMT mountable and is manufactured 100 % automatically.

Figure 8: WE-STST shapes and dimensions

The transformer consists of a MnZn core with bifilar windings for both primary and secondary on top of each other for signal coupling. Insulation is provided by an enamel coating of the wires, both on the primary and secondary side. Due to the direct coupling and the transmission ratio of 1:1 differential signals are transmitted with only very low attenuation, DC signals are blocked by the galvanic isolation. Besides the galvanic isolation, a signal transformer needs to transfer data in a determined frequency range of 1 – 66 MHz for 100BASE-T1 Single Pair Ethernet. For 10BASE-T1 with frequencies between 0.1 and 20 MHz, the same kind of transformer can be used. The parameters for signal integrity are return loss and insertion loss (Sdd21 and Sdd12). Over the complete signal frequency range, the IL should not exceed -3 dB. IL and RL curves for the WE-STST series can be seen in figure 10.

Figure 9: Insertion Loss (red) and Return Loss (black)

More information about the WE-STST can be found here: SN016

3.4 Transformer GND termination

The common mode rejection ratio (CMRR) is a parameter that indicates about how well common mode signals are filtered. Although it’s not defined in the IEEE 802.3cg or IEEE 802.3bw, it is important to reach good values over the complete frequency range, as common mode signals are the main reason for data failures. The CMRR of the transformer strongly depends on the inter-winding capacitance of the transformer. The CMRR values can significantly be improved by connecting the transformer center tap to ground.

In this way, the center tap GND connection offers an excellent low impedance path for common mode signals (see figure 11).

On the cable side, the GND connection consists of a termination resistor connected to a 1 nF capacitor. The resistor terminates the SPE signal with 100 Ohms while the capacitor provides a low impedance path to GND and has 2 kV galvanic isolation.

Figure 10: Common Mode Rejection of WE-STST with (black) and without (grey) GND termination

In this way, the center tap GND connection offers an excellent low impedance path for common mode signals (see figure 11).

Figure 11: Common Mode Rejection of WE-STST with (black) and without (grey) GND termination

The capacitor C2 at the center tap of the transformer shown in Figure 8 has two tasks. First, it prevents a short circuit of the PHYs offset voltage to GND. On the other hand, it provides a HF connection to ground, so that common-mode interference is well dissipated. The symmetrization of the signals around 0V is done after the transformer, because it only allows the AC voltage part of the signal to pass through. The DC offset gets blocked. Apart from the center tap pins, the common mode behavior of the transformer also depends on parasitic effects between its windings. By superimposing the windings the leakage inductance will kept as low as possible, however, this increases the parasitic capacity between the windings. The parasitic effects can be reduced to a minimum by selecting the insulation material, the arrangement of the windings and other constructional measures, so that the transformer can be used up to the high frequency range of over 60 MHz.

3.5 Noise suppression with common mode choke

The target of the common mode choke is to balance signal, i.e. to symmetrize the signal in such a way, that no common mode energy is disturbing the information transmitted (the differential mode portion of the signal). To reach this target, the common mode interference should be removed without affecting the integrity of our differential signal. That is why using a common mode choke with large common mode impedance and small differential mode impedance in the desired frequency range is essential.

Based on the graph results and knowing the limits to keep for each of the Ethernet protocols, part number 744232222 for 100BASE-T1 is chosen. It comes in a 1206 package and has and impedance of almost 50 Ω at 1 MHz and 2200 Ω at 100 MHz.

The choice of the common mode choke also has an influence on the the mode conversion. The higher the number of turns in a choke with the same winding technology, the higher (worse for signal integrity) the mode conversion between differential and common mode will be. This implies that a portion of the differential signal will be converted into common mode in some frequency ranges.

Table 2: Electrical characteristics of the current-compensated choke

Figure 12: Common mode and differential mode impedance 744232222

3.6 ESD suppression

TVS diodes can clamp overvoltages to a level which is not critical to the ICs and which doesn’t tend to couple in other traces. Besides the clamping effect, the TVS diodes shouldn’t influence the data signal. To make sure the SPE data signal will not be disturbed, the parasitic capacitance of the TVS diode should not exceed 2 pF.

For SPE systems article 824012823 is chosen, which can be connected with the two pins for signal input (IO1 and IO2). It comes with a package size of 1.2 mm x 1.0 mm. The diode is suitable for data signals < 3.3 V peak with an input capacitance of 0.27 pF.

Figure 13: TVS diode schematic and product

At 10 GHz the IL value is +1.57 dB, so the TVS Diode is almost invisible for the data signal. Figure 14 shows the clamping behaviour during an ESD event. Transmission Line Pulse (TLP) is a test method used to simulate loads that have a short pulse width and rise time. These are similar to those of ESD events. In our case it means to step from 0 A to 13.5 A with 100 ns impulses. For example a 4 kV ESD impulse according to IEC 61000-4-2 generates after 30 ns a current of 8 A. This results to a clamping voltage of 6 V after the TVS Diode. So the IC just has a voltage of 6 V instead of 4 kV at the signal pin.

Figure 14: TLP Measurement

In general, the best approach is to place the TVS diode as close as possible to the connector. Because the high frequency ESD Impulse can couple easily to other signal lines. However, during a highpot test the TVS Diode will be triggered into low resistance mode. To avoid short circuits and destruction of the diode by the current flow during hipot tests between signal pins and GND, the diode is either placed between transformer and PHY or (if placed between socket and transformer) separated from GND during the test.

3.7 Performance Comparison SPE automotive vs. SPE industrial

In order to be able to assess the performance of the transformer circuit, it is compared with two other circuits in the following section. The first circuit uses 50 V capacitors with 100 nF for galvanic isolation, which are used in Automotive Ethernet. The second circuit uses 2 kV capacitors with 100 nF. The high demands on the return loss of 10BASE-T1 and the mode conversion loss of 100BASE-T1 lead to different designs of the respective variant. The differences between 10BASE-T1 and 100BASE-T1 designs are mainly the presence or absence of common mode chokes for common mode filtering.

For SPE 10BASE-T1 the circuit diagram with two parallel capacitors, as described in section 3.1, is used.

In the case of 10BASE-T1 the lower signal frequency is 100 kHz, a common mode choke with a low resonant frequency must also be selected. The common mode choke 744272222 not only provides common mode suppression but also has a positive influence on return loss and mode conversion loss. Due to the low cut-off frequency, the dimensions (10 mm x 8.7 mm) and inductance value (2 x 2200 µH) of the common mode choke are correspondingly large. The common mode rejection for 74472222 is illustrated in figure 15.

Figure 15: Common mode and differential mode impedance 744272222 for 10BASE-T1

A more compact and electrically equivalent solution is the design with a transformer. Figure 16 shows the transformer design for 10BASE-T1. In contrast to section 4, no common mode choke is required for the 10 Mbit/s design. The reason is the good interference suppression of the transformer at low frequencies. Another difference is the capacitor C3 on the two center tap pins which extends the transformer bandwidth up to 35 kHz and thus helps to improve the return loss in low frequencies.

Figure 16: 10BASE-T1 transformer design

Since it is not possible to split the center tap pin on all transformer types, two capacitors can be used on the outer transformer pins as an alternative to C3 between the transformer center pins, to achieve galvanic isolation. This design enlarges the circuit minimally, but has the advantage, that the similar circuit can be used for Power over Dataline (PoDL) applications. For PoDL the voltage on both capacitors drops only half, thus preventing DC saturation. If only data is transmitted, capacitors with an isolation voltage of 25 V are sufficient, whereas with PoDL an isolation voltage of 100 V is necessary.

Figure 17: Capacitors C₄ and C₅ on the outer transformer pins as alternative to C₃

In addition to the insulation voltage of the capacitors, their capacitance is important for both circuit diagrams. Simulations and measurements result in a minimum value of 100 nF to meet the limits of IEEE802.3cg. However, the section "146.5.4.2 Transmitter output droop" mentions a maximum voltage drop of 10% between 133.3 ns and 800 ns for a test signal of the PHY chip. To meet this requirement, two changes can be made. Either the inductance of the transformer is increased, which means an increase in size or capacitors with larger capacitance values are used. The second possibility is more space-saving, cheaper and easier to implement. In this case 470 nF capacitors are used to achieve the best compromise between the droop and return loss requirements. As figure 18 and the following equation shows, this circuit design achieves a voltage droop of about 8.3 % and is therefore within the standard.

Figure 19 illustrates the differences in size of the different circuits. The common mode choke takes up the most space on the PCB of the two 10 MBit designs with capacitor. Relatively large are also the 2 kV capacitors with 100 nF.

Figure 18: Measurement on the oscilloscope: The voltage droop on the signal plateau represents the voltage drop

Figure 19: Footprint with different filter designs. 1. SPE 50 V isolation capacitors; 2. 1500 V isolation transformer without CMC; 3. 2000 V isolation capacitors

3.8 Measurement

As the RL measurement shows, the values which represent the capacitor solutions (in figure 20 grey and black) are almost exactly one above the other. The RL readings for both cap solutions come very close to the IEEE limit line between 100 kHz and 200 kHz. Significantly better values are achieved by the transformer design (red curve), which also achieves better results than the capacitor solution at higher frequencies from 5 MHz.

Figure 20: 10BASE-T1 return loss measurement with 50 V capacitors (grey); 2000 V capacitors (black) and transformers (red)

All three measurements show very good values for the mode conversion loss. This can be seen from the fact that the distance between target and actual values is always between 30 and 40 dB. The capacitor solutions are still somewhat better between 0.1 and 6 MHz and the transformer solution between 6 and 20 MHz.

Figure 21: 10BASE-T1 mode conversion loss measurement

3.9 100BASE-T1

The 50 V capacitor design corresponds to the circuit diagram in section 3.1. The common mode choke can be dimensioned much smaller compared to the 10BASE-T1 design, because interference suppression in low frequencies between 0.1 and 1 MHz is not necessary. Due to the size reduction of the Common Mode Choke, the 50 V solution is the most compact of all three designs.

Although significantly smaller due to the smaller choke, the footprint of the 2 kV capacitor design remains the largest of all designs in terms of area (see figure 22). Apart from the large capacitors, there are no differences to the 50 V automotive Ethernet design.

Unlike 10BASE-T1, the transformer design requires a common mode choke for interference suppression in frequencies up to 200 MHz. The circuit diagram corresponds to that in section 4, “Solutions" The common mode choke suppresses both mode conversion and common mode signals in the higher frequencies.

The results are described in more detail in the next section "Measurement".

Figure 22: Size comparison of different footprints on the PCB for Single Pair Ethernet 100BASE-T1

3.10 Measurement

Figure 23: 100BASE-T1 Return Loss measurement

In the return loss measurement, the values in the frequencies between 1 - 20 MHz are closer to the nominal curve in the transformer solution than in the other two designs, with the 2 kV capacitor solution still showing the best results. Overall, the values of all traces are at a sufficient distance from the return loss limit (at least 3 dB).

Figure 24: 100BASE-T1 mode conversion loss measurement

In the case of mode conversion loss, the measured values in the design with the 50 V capacitors from 25 MHz are very close to the limit of the IEEE standard and in some cases almost exceed it. The transformer design and that of the 2 kV capacitors prove to be a better alternative here. In this frequency range, their measurement curves have a significantly greater distance from the nominal curve (about 3 dB).

4 Summary / Conclusion

With both capacitor solutions, the expected component tolerances mean that it cannot be guaranteed that the return loss of the circuit will meet the requirements of IEEE 802.3cz for 10BASE-T1. In addition, the footprint is large compared to the transformer due to the common mode choke and, in the case of the 2 kV cap solution even larger.

For the 100BASE-T1 designs, the 50 V cap solution proves to be only partially suitable to meet the mode conversion loss requirement at frequencies > 30 MHz. Even if the fact of the mandatory electrical isolation according to IEC 62368-1 is disregarded, the transformer solution is the most compact and, in terms of signal stability, the most suitable solution for Single Pair Ethernet, both 10BASE-T1 and 100BASE-T1.

A. Appendix

A.1.BOM

IMPORTANT NOTICE

USEFUL LINKS

Application Notes www.we-online.com/appnotes

REDEXPERT Design Plattform www.we-online.com/redexpert

Produkt Catalog www.we-online.com/products

CONTACT INFORMATION

Tel. +49 7942 945 - 0

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1 ⋅ 74638 Waldenburg ⋅ Germany

Tags: industrial application, communications, single pair ethernet, connector, common mode choke, ethernet, cable, filter, spe, app note, wurth_elektronik

SN015: Contact debounce circuit for switches

Würth Elektronik — Tue, 09 Nov 2021 07:57:41 GMT

Current Revision posted to Documents by Würth Elektronik on 11/9/2021 7:57:41 AM

SUPPORT NOTE

Contact debounce circuit for switches

SN015 BY ALEXANDRE CHAILLET / EVELYN HUANG

1 Introduction

Würth Elektronik offers a wide range of switch products. These products are used for many applications to simply open and close electronic circuits.

Figure 1: Part of the WE-switch portfolio

The switching function is mainly mechanical, but many switches are operating like an analog-digital interface for modern electronic circuits, with clearly defined voltage levels for logic 0 and logic 1. But anyone who has built an application with a tact or detector switch with a fast responding electronic circuit may be wondering why the circuit is not working properly. The reason may be what is called contact bouncing (also known as chattering). There are possibilities to eliminate the effects of this phenomena and this application note proposes a circuit to avoid this common issue.

2 What is contact bounce

2.1. Principle of switching mechanics

We naturally have the impression that the contact in a switch is immediate and firm.

Figure 2: Idealized graph of a switched signal

However, the “reality” looks a little bit different.

Figure 3: Idealized graph of a “real” switched signal

At each switch position, contact between electrically conductive points is established or separated by means of movable mechanical elements.

Figure 4: TACT switch design

Typically, spring components are used as transmitters of the nominal state, either as a metal plate or as a coiled spring, which have a certain mass and thus a certain moment of inertia. When these small components are set in motion for a change of state, they are accelerated until they have reached the desired position. There, they experience a reverse acceleration due to the principles of elastic shock and their spring characteristics. This effect occurs several times in succession until the movement is completely damped. As the damping factor is high and the moment of inertia is small, the effect itself typically only takes a few microseconds. This is not problematic for power circuits but this rebounding signal on status change creates bad transitions for a digital input. During the status change, the electronic signal has an unstable or better said undefined status. For a logic IC this can be really problematic, as it needs a clean defined signal. A microcontroller reading the port may miss the changed state if read at the wrong moment. Therefore a solution is needed to generate a clear output from the switch and we will take a look at a switch debounce circuit to solve this problem.

2.2. Applicable products

Debounce time is given in the product datasheet. Würth Elektronik defines bounce time as the time between when the product is mechanically switched and when it is fully electrically switched.

Table 1: Applicable products for debounce circuit

3 Debounce circuit

In the following we will add some components to create a low pass filter circuit to see the influence on the signal output.

3.1. Adding a filter

The base switch circuit with no debounce compensation circuit looks like the following:

Figure 5: Switch circuit without debounce circuit

Classical values for resistor are R₁ = 1 kΩ to 10 kΩ and V_CC = 5 V.

Pushing the switch gives the following switching response that shows the bounce effect:

Figure 6: Output without debounce circuit during high to low transition

To solve this bounce in the V_OUT signal, a different electronic circuit is proposed. The following electronic circuit, a simple RC filter is one of the cheapest and simplest to realize. When the switch is open the capacitor charges through R₁+R₂ which causes the voltage to rise more slowly. When the switch is closed, the capacitor is discharged through R₂ at a controlled rate.

Figure 7: Switch circuit with a basic debounce circuit

When the components are selected carefully, the switch bouncing is absorbed during the charging or discharge period providing a smooth transition.

To calculate the value of capacitor and resistors, we need to know the following time constant formula applicable for this schematic:

ꞇ = (R₁+R₂)×C₁ (1)

ꞇ : time constant in s

R : resistor value in Ω

C : capacitance value in F

The time constant is a balance between the needs to debounce the switch and the required response time of the circuit. During one time constant the voltage will rise to 63% of its final value or fall to 37% of its final value. In both cases, 99% is reached after five time constants.

3.2. Calculation example:

Fixed conditions

Bounce time: specifications give 10 ms
R₁ is chosen to limit current, we take the classical value of 1 kΩ.
R₂: we choose two standard values for debouncing: 10 kΩ and 47 kΩ.
Supply Voltage is 5 V_DC

Therefore, calculation gives two capacitance values:

C₁=τR₁+R₂ (2)

And then we propose two value ranges for this circuit:

Solution 1 : R1 = 1 kΩ, R₂ = 10 kΩ, C₁ = 1 μF
Solution 2 : R1 = 1 kΩ, R₂ = 47 kΩ, C₁ = 220 nF

For both circuits, the answer becomes like following:

Figure 8: Output with debounce circuit during low to high transition

Note: Resistance and capacitance values, could vary according to customer circuit design

The value of U_OUT vs. time is given by the next formula

U_OUT=U_IN×(1−e^−tꞇ) (3)

We see that at t = ꞇ, we reach a value of U_OUT ≈ 63 % U_IN.

In our example U_OUT is at 63 % (3.15 V) of its final value (5.0 V) after 10 ms.

3.3. Adding a diode

It is possible to control the charge time and discharge time separately by adding a diode across R₂. This allows for a faster transition time to charge the capacitor using R₁ and D₂ and a different discharge time using only R₂, as in this case the diode is blocking.

Figure 9: Adding a diode to the schematic

3.4. Adding a buffer

The user must also be aware the digitial logic is defined with zero being below a certain voltage (ie. 0.8 V) and one being above a certain voltage (ie. 2.5 V). The values between are undefined. If the application cannot support the undefined values a Schmitt trigger buffer with hysteresis may be required. A circuit with different switch-on and switch-off times and additional hysteresis is shown in figure 10. The response time of the circuit may have to be coordinated with the sampling time of the microcontroller.

Figure 10: A schmitt trigger enures stable and defined voltage values

3.5. Transient protection

If the switch is located far away or at the end of a long wire, there will likely be a need for protection against overvoltage, ESD or other transients. This can be as simple as a ferrite bead and TVS diode in front of the input circuitry.

Figure 11: Adding a ferrite bead and TVS diode for overvoltage protection

4 Summary

Using mechanical switch products for signals gives a bounce effect that may cause short periods of unstable signal for an electronic circuit. Würth Elektronik switches have a bounce time of up to 10 ms, which should be considered, depending on the application. Therefore, the proposed filter in figure 7 can help to reduce this phenomena. The filter can also be upgraded with additional components for more refined signal conditioning and overvoltage protection.

A. Appendix

A.1. References

Brander, T., Gerfer, A., Rall, B., Zenkner, H., Trilogy of Magnetics, 5th ed., Waldenburg, 2018
Gerfer, A., Jugy, R., Mroczkowski R., Robok, T., Trilogy of Connectors, 3th ed., Waldenburg, 2015

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CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES ARISING OUT OF THE USE OF WE PRODUCTS IN SUCH SAFETY-CRITICAL APPLICATIONS.

USEFUL LINKS

Application Notes: http://www.we-online.com/app-notes

REDEXPERT Design Tool: http://www.we-online.com/redexpert

Component Selector: http://www.we-online.com/component-selector

SN015: Contact debounce circuit for switches

Product Catalog: http://katalog.we-online.de/en

DIRECT LINK

CONTACT INFORMATION

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1, 74638 Waldenburg, Germany

Tel.: +49 (0) 7942 / 945 – 0

Tags: tact switch, debounce circuit, switches, switching mechanics, support note, wurth electronic, bounce effect, contact debounce circuit, contact debounce, tact_switch, mechanic

Power Inductors 8 Design Tips

Würth Elektronik — Tue, 02 Nov 2021 09:10:52 GMT

Current Revision posted to Documents by Würth Elektronik on 11/2/2021 9:10:52 AM

Power Inductors 8 Design Tips

A practical guide for the selection of power inductors for DC/DC converters

Switching regulators are becoming increasingly important thanks to their high efficiencies. The trend is towards regulators with output voltages lower than 1 V, load currents up to 60 A and switching frequencies up to 8 MHz. At the same time, users demand the smallest possible types. Switching regulator design is supported by specialised software, for example from Würth Elektronik (Component Selector), Texas Instruments (Switcher Pro for TPS60xxx, TPS40xxx and TPS54xxx), Exar (Power Lab), National Semiconductor (WEBENCH) or Linear Technology (Switcher CAD/LTspice IV). The relevant SMD power inductor design kits from Würth Elektronik offer quick access to a range of components for the construction of in-house prototypes or for optimisation. But what has to be taken into account when using power inductors?

Switching frequency

The switching frequency of typical converter ICs on the market is in the range 100 kHz to 2MHz. First generation regulators operated in the range 30 kHz to 55 kHz. This leads to the following recommendations:

DESIGN TIP 1: Suitable core materials

Switching frequency < 100 kHz: Iron powder, ferrite, Superflux, WE-PERM

Switching frequency 100-1000 kHz: Ferrite, Superflux, WE-PERM

Switching frequency > 1000 kHz: Ferrite, WE-PERM

Inductance value

If there is no application note or software available, inductance can be calculated using the following rule-of-thumb formula:

Step-down regulator: L=(U_inmax−U_out)×(U_out+U_D)(U_inmax+U_D)×0.3×I_out×ƒ

Step-up regulator: L=(U_out+U_D−U_inmin)×U²_in2×0.2×I_out×(U_out+U_D)²×ƒ

with the ripple current factors 0.2 to 0.4 (selected as 0.2 and 0.3 in this example). I_out is the operating current of the circuit to be supplied, U_out the output voltage and U_in the input voltage, f is the switching frequency of the regulator IC. Standard values for inductance L can be selected on the basis of the calculated value. If, for example, the value 37.36 μH is obtained as the result – you would select the standard values 33 μH, 39 μH and possibly also 47 μH for testing.

DESIGN TIP 2

-> higher inductance – smaller ripple current

-> lower inductance – higher ripple current

The ripple current is essential in determining the core losses. Besides the switching frequency, it is therefore an important parameter for minimising the power loss of the power inductor

Inductor current ratings

The current load for power inductors can be calculated very accurately in terms of DC current load and ripple current load (core losses) using the manufacturers’ simulation software. The following approach can be chosen as a rough calculation:

Step-down regulator:

Nominal current of the inductor: I_N=I_out

Maximum coil current: I_max=1.5xI_N

Step-up regulator:

Nominal current of the inductor: I_N=(U_outU_in )×I_out

Maximum coil current: I_max=2×I_N

DESIGN TIP 3:

Please observe the definitions for the data sheet specifications. The nominal current for power inductors is usually linked to the specified self-heating with DC current – here self-heating of +40°C is common at the nominal current. According to semiconductor manufacturers‘ recommendations, the saturation current is the point at which the inductance value has fallen by 10%. Unfortunately, this is not a standard value for power inductor data sheet specifications and often leads to misinterpretation among users.

DC resistance

Once the required values for inductance L and inductor currents are calculated, you select a power inductor with the minimum possible DC resistance. Here the demands are often counteractive:

Small size, high energy storage density and low DC resistance.

Using suitable winding methods and new series, such as the Würth Elektronik WE-HCI and WE-PDF flat-wire inductors, this ideal case is very close to realisation. The data sheet definition must also be observed here: Is the DC resistance specified as a typical value or as the max. value required for calculating the circuit under worst case conditions?

DESIGN TIP 4: DC resistance with the same size

-> higher inductance – higher DC resistance

-> lower inductance – lower DC resistance

-> same inductance for a shielded inductor – lower DC resistance

The DC resistance is essential in determining the wire heating losses; this is another important parameter for minimising the power loss of the power inductor.

Type and EMC

Magnetic shielded power inductors like WE-PD, WE-TPC, WE-DD or WE-HCI are recom mended for EMC-critical applications. The shielding prevents uncontrolled magnetic coupling of the windings with neighbouring conductor tracks or components.

DESIGN TIP 5:

Use a magnetically shielded power inductor if at all possible. Do not route any conductor tracks under the component and do not place any circuit boards directly above the component, as this could give rise to coupling via the air gap remaining.

Unshielded power inductors like WE-PD2 can be used for uncritical applications or for low power circuits. Many packaging series can even be changed from shielded to unshielded versions while maintaining solder pad compatibility.

DESIGN TIP 6:

Advantage of magnetically shielded inductors of the same type:

-> higher A_L value, therefore lower DC resistances for the same inductance = lower wire losses.

Disadvantage of magnetically shielded inductors of the same type:

-> slightly increased core losses due to a larger core volume. Given correct dimensioning the core losses remain low.

Output L-C filter

An L-C filter at the DC converter output is recommended if a low noise output voltage is required. The components can be selected as follows [1]:

DESIGN TIP 7:

-> Select cut-off frequency at 1/10 of the switching regulator frequency

-> Select output capacitor (e.g. 22 µF)

-> Calculate inductance

L=1(2×π×ƒ )×C

DESIGN TIP 8: Ripple measurements

To properly measure ripple on either input or output of a switching regulator, a proper ring in Tipp measurement is required. Standard oscilloscope probes come with a grounding clip, or a long wire with an alligator clip. Unfortunately, for high frequency measurements, this ground clip can pick-up high frequency noise and erroneously inject it into the measured output ripple.

The standard evaluation board accommodates a home made version by providing probe points for both the input and output supplies and their respective grounds. This requires the removing of the oscilloscope probe sheath and ground clip from a standard oscilloscope probe and wrapping a non-shielded bus wire around the oscilloscope probe. If there does not happen to be any non shielded bus wire immediately available, the leads from axial resistors will work. By maintaining the shortest possible ground lengths on the oscilloscope probe, true ripple measurements can be obtained.

Summary

The power inductor selection steps described are based on the design tips given in this article and are linked to the data sheet specifications. Not only the relevant design software from the semiconductor manufacturer serves to reduce development times. With the software Component Selector you get a tool which identifies very quick the right inductance for a buck or a boost converter. As a matter of course power inductors from Würth Elektronik are also listed in the leading semiconductor manufacturers‘ software solutions and hence they are immediately available for inclusion in the simulations. Correspondingly assembled design kits help optimise prototypes. Magnetically shielded power inductors should be deployed for EMC-critical applications.

References:

[1] Schramm, C.; DC-Wandler: Ausgangsspannung „säubern“ [DC converters: “clean up” output voltage]; ELEKTRONIK, Issue 23/2001. pg. 88ff

[2] Gerfer, A.; Rall, B.; Zenkner, H.: Trilogy of Magnetics, 4th extended edition 2009, Swiridoff Verlag, ISBN 978-3-89929-157-5

[3] Würth Elektronik, Component Selector, download at: www.we-online.com/component-selector

[4] Linear Technology Switcher CAD III /LTspice IV, download at: www.linear.com/ltspice

[5] Texas Instruments, Switcher Pro, download at: www.ti.com/switcherpro

[6] Exar, Power Lab, download at: www.exar.com/powerlab

[7] National Semiconductor, WEBENCH, download at: www.national.com/webench

USEFUL LINKS

Application Notes: http://www.we-online.com/app-notes

REDEXPERT Design Tool: http://www.we-online.com/redexpert

Component Selector: http://www.we-online.com/component-selector

Product Catalog: http://katalog.we-online.de/en

DIRECT LINK

Power Inductors - 8 Design Tips

CONTACT INFORMATION

Würth Elektronik eiSos GmbH & Co. KG

Max-Eyth-Str. 1, 74638 Waldenburg, Germany

Tel.: +49 (0) 7942 / 945 – 0

Tags: power_inductors_design_tips, power inductor, emc, selection, inductor selection, würth elektronik, design tips, dcdc converters, practical guide

ANP045: Behind the Magic of High Frequency SMT Chip Bead Ferrites

Würth Elektronik — Mon, 25 Oct 2021 12:09:44 GMT

Current Revision posted to Documents by Würth Elektronik on 10/25/2021 12:09:44 PM

APPLICATION NOTE

Behind the Magic of High Frequency SMT Chip Bead Ferrite

ANP045 BY JOANNE WU

1 Introduction

Technology is advancing at a tremendous rate and the next generation of devices are shifting towards wireless applications. The movement towards higher frequency, into the gigahertz range has begun and more knowledge of components in these applications is desired. EMC continues to grow in importance and there is a demand to know the characteristics of EMC components used beyond their current typical application range. The goal of this article is to explain the different properties between multilayer ferrite beads in high frequency (WE-CBF HF) and standard multilayer ferrite beads (WE-CBF), as well as a new methodology developed at Würth Elektronik for the measurement of DC bias at high frequencies. Lastly, some uncommon applications, where the WE-CBF HF high frequency series are a suitable alternative to traditional design topologies are shown. Chip bead ferrites are one of the most used components for suppressing high frequency noise in the electronics industry. They are passive components with a high attenuation over a wide frequency range, and at the same time do not influence the useful component of the signal. They are commonly connected in series with the power supply or signal source. Nevertheless, improper use of the ferrite bead in the system can degrade the overall EMI suppression capability.

2 Equivalent Circuit Modelling

Ferrite beads can have different characteristics at different frequencies. These can be roughly separated into three regions: inductive, resistive and capacitive characteristics (Figure 1). At its self-resonating frequency (SRF), the ferrite bead performs as a resistor, impeding high frequency signals and dissipating the power as heat.

Figure 1: Impedance curve of WE-CBF HF (742 841 160)

The intended use of ferrite beads for EMI applications is, that the component must be in the resistive region over the frequency range where the noise needs to be attenuated. Parasitic elements inside the bead drastically affect the performance as a function of frequency. In order to take into consideration these parasitic elements, the equivalent circuit is modeled in the following topology consisting of an inductance (L), parallel capacitance ( C_PAR ), parallel resistance ( R_AC ) and series resistance ( R_DC ) (Figure 2). This is frequently used in simulations to model a ferrite bead, and this model will be used to explain how these parasitic parameters influence the impedance curve.

Figure 2: Equivalent circuit model.

3 Comparison WE-CBF HF and WE-CBF series

The Würth Elektronik multilayer ferrite bead family is categorized in different series, depending on their intended application, the shape of the impedance curve, core material and structure of the internal windings. In response to the movement towards operating at higher frequencies, Würth Elektronik has developed the WE-CBF HF “SMT EMI Suppression Ferrite Bead” (High Frequency) series. Here a comparison between the standard series WE-CBF and the high frequency series WE-CBF HF will be explored. This series is specially fabricated to increase performance, which means higher impedance and lower parasitic capacitance at higher frequencies. A key factor in the electrical behavior of multilayer ferrite beads at different frequencies is the construction direction of the windings and the internal design. The inner structure not only influences the frequency response but also the impedance the chip beads can produce. Horizontal windings (Figure 3) and vertical windings (Figure 4) have a fundamental effect on the performance of ferrite beads, even within the same case size. To understand the performance, the formation of parasitics within the structure is analyzed. In order to understand how the construction and parasitics influence the electrical properties, the association between this and the impedance of a chip bead is identified. The relationship to the overall impedance is described by applying the impedance equation (Equation 1). The main influence from parasitic elements come from the reactive part of the equation. The lower the capacitive reactance ( X_C ) and the more inductive reactance ( X_L ) found in the total reactance, the higher the magnitude of the impedance.

Figure 3: CT of inner structure of chip bead ferrites (WE-CBF). Figure 4: CT structure of vertical ferrite bead (WE-CBF HF).

Figure 5: The parasitic capacitances of the WE-CBF (left) and WE-CBF HF (right).

|Z|=√R²+(X_L−X_C)² (1)

The basic CBF design has horizontal windings layered in the vertical direction (Figure 3). This makes them easier to fabricate and reduces production costs. However, this type of structure yields a lower impedance with an impedance peak at a lower frequency than for example the WE CBF HF, which has vertical windings layered in the horizontal direction (Figure 4). The horizontal structure is limited to the number of windings due to the standard height of a SMD ferrite. On the other hand, the vertical structure utilizes the length dimension to increase the winding layers. In a horizontal winding, every winding runs between the connection terminals, creating a small parasitic capacitance ( C_p ) between the winding and terminal (Figure 5 left). Each winding creates layers of: Terminal – parasitic capacitance – winding – parasitic capacitance – terminal structure. These layers contribute to the parasitic as the subcircuits accumulate in parallel, creating a sum up of capacitances in which will decrease the overall reactance (Equation 2).

C_parallel=C₁+C₂+C₃+...+C_n (2)

In the ferrite bead WE-CBF HF, the silver layer is formed like a wound air coil, looping steadily from one terminal to the other (Figure 5 right). This causes parasitic capacitance to be present between the loops (inter winding capacitance) and at each end terminations. As the parasitic capacitance is in series with their neighbor, the overall capacitance is the inverse of the sum of all inverse capacitances (Equation 3). Consequently, the total parasitic capacitance is just a fraction of the parasitic capacitance of that found in the ferrite bead WE-CBF. This has the effect of increasing the SRF and therefore the possible operating frequency range is shifted to higher frequencies.

1C_series =1C₁ +1C₂ +1C₃ +...+1C_n (3)

Consider the WE-CBF (742792693) compared with the WE-CBF HF (742861210), where both are size 0603 of type wide band and have a peak Z_MAX around 2.2 kΩ (Figure 6 left). After the SRF the ferrite bead becomes capacitive and this effect of parasitic capacitances can be observed from their reactance behavior as the value is no longer rising but falling (Figure 6 right). From the WE-CBF, the parasitic capacitance becomes dominant at 100 MHz, while the WE-CBF HF dominates at 450 MHz, shifting nearly five times higher in frequency than the standard part. Not only being able to have the SRF reach a higher frequency region, in this case it also allows the use of a WE-CBF HF over a wider frequency range than the standard WE-CBF series. For example, a request for a filter with an impedance of 500 Ω, the WE-CBF has a range from 30 MHz to 300 MHz, while the WE-CBF HF has a larger range from 70 MHz to 2500 MHz, permitting a much wider operating bandwidth (Figure 7). With the same size, type and similar electrical characteristics, a wider usable bandwidth may mean less EMI issues in this region. Summarized, the design of the inner structure windings contribute to the total parasitic capacitance. They sum up to be either in parallel or series and this can lead to achieving a SRF located in a higher frequency region.

Figure 6: Interactive chart in REDEXPERT comparing the impedance (left) and reactive part (right) of WE-CBF 742792693 (orange) and WE-CBF HF 742861210 (blue) with 0 A DC bias current

Figure 7: Interactive chart in REDEXPERT comparing the impedance of WE-CBF 742792693 (orange) and WE-CBF HF 742861210 (blue) with 0 A DC bias current.

Furthermore, the bandwidth also shifts up in frequency and consequently the range of use is higher and may be wider too.

4 The Effect of Temperature and DC bias Current

The optimal selection of a multilayer ferrite to suit the need of a specific application requires, among other parameters, defining the operational temperature and DC current. External influences cause the multilayer ferrite to behave differently. For example a change of temperature can modify the magnetization state of a ferrite bead. In addition, the so called DC bias effect is the current-dependence of general ferrite materials. The DC current can also be correlated to the operating temperature of the component, as the part generates heat due to the current and therefore influences its electrical characteristics. Magnetic materials have a maximum useful operating temperature. At a certain point, the magnetic permeability of a material decreases strongly with increasing temperature (Figure 8). At temperatures where the thermal energy is greater than the energy supplied by the external magnetic field, the magnetic dipoles (elementary magnets) become difficult to align preventing the formation of a magnetic field. This critical temperature is called the Curie temperature. At temperatures above the Curie temperature, the ferrite loses its permeability (where it drops to µ = 1) and becomes paramagnetic (weakly magnetized). With this knowledge, the alignment can be destroyed by heating beyond the Curie temperature or through other methods of thermal exposure, shock and even strong magnets. This effect is reversible. When the temperature cools below the Curie temperature the ferrite regains its permeability and becomes ferromagnetic again. Using this sequence of events will allow the ferrite beads to be measured in a consistent manner, by aligning the magnetic dipole to a remanent free initial state.

Figure 8: Curie temperature.

Ferrite beads are made to dissipate heat, however the more it dissipates the higher the operating temperature it reaches. Figure 9 shows a typical temperature profile of a chip bead with a curie temperature of above 180 °C, where the measurement is carried out from -55 °C to 160 °C. As depicted, the higher the temperature of the component, the more the impedance is shifted down, becoming more saturated. The optimal operating temperature would be to stay as close to the ambient temperature (~20 °C to 25 °C). Engineers should take this and environmental influences into consideration, when designing applications.

Figure 9: Impedance graph of WE-CBF 742792040 with temperature.

Beside the temperature, multilayer ferrites are always operated under current bias; therefore, measurements with DC bias give essential information about the components behavior during operation. The impedance profile is graphed to depict the influence of various DC bias current conditions (Figure 10). As the applied current increases, the internal core material moves towards saturation, causing a drop in inductance. This saturation is due to the maximum magnetic dipole alignment and will change the permeability (hence impedance) of the ferrite. As shown in the low frequency region, the biasing current has a more drastic affect compared to the high frequency region.

Figure 10: Comparison of the WE-CBF HF (742861160) under differing DC Bias conditions.

As the DC bias current increases, the inductance decreases, however the parasitic capacitance stays the same. This leads to the SRF peak to shift right towards higher frequencies. In addition, the damping resistance also becomes lower and moves right, causing the quality factor to increase. In this scenario, SMD ferrites produce sharper and higher SRF peaks. Lastly, it can be seen that the impedance converges towards one point at the end of this frequency range (WE-CBF HF 742841160742841160 at 8 GHz). This is caused by the ferromagnetic effect, dominating up to the SRF. Above the SRF the ferromagnetic effect is still present, however it is hidden by the resonance and capacitive effects. The ferromagnetic properties lose their influence with decreasing permeability and become paramagnetic. In this state, the bead physically acts like a wire coil at its capacitive state (due to parasitic capacitance). The amount of magnetic field strength which causes saturation differs depending on the material used for the core. For example Nickel-Zinc (NiZn) is a commonly used core material and displays ferromagnetic properties. Below, two WE-CBF HF parts that have similar properties but different core material are compared. Both parts are defined in the datasheet at 100 MHz with a typical impedance of 600 Ω at 0 A DC bias current (Figure 11). As the components each have different saturation levels, when the ferrite beads are exposed to a DC bias current of 100 mA, both parts saturate and impedance decreases rapidly as seen in Figure 12. However, the 742863160 (orange curve) has a higher saturation level and can maintain its impedance levels compared to a decrease in impedance from 742861160 (blue curve). At the 100 MHz frequency marker, a clear drop in value is seen after 100 mA bias current is applied as noted between Figures 11 and 12. It can be observed that depending on the material, there are different responses to saturation current.

Figure 11: Interactive chart in REDEXPERT comparing WE-CBF HF 742861160 (blue) and 742863160 (orange) with 0 mA DC bias current.

Figure 12: Interactive chart in REDEXPERT comparing WE-CBF HF 742861160 (blue) and 742863160 (orange) with 100 mA DC bias.

This chapter demonstrates, that influence from temperature and DC bias are key parameters for the selection of the correct component. The impedance graphs of chip bead ferrites can be found in the respective datasheet with a DC bias current graph showing key current values. However, Würth Elektronik’s measurement based online design platform REDEXPERT, can be used to easily determine the impedance and other electrical characteristics of any chip bead ferrite at any operating frequency and DC bias current. Alternatively, incorporating a chip bead ferrite into a simulated design for evaluation is possible with the availability of S-parameters and SPICE simulation models.

5 State of the Art Measurement Methodology

The common industrial impedance analyzers and DC bias test fixtures for SMT devices have reached their frequency measurement limitations. At frequencies above 1 GHz, measurements are inherently unstable or not possible due to the measuring method. In addition, an external supply of up to 5 A is the maximum applicable DC biasing current available. This limits the information provided in data sheets for designers wanting to know the profile of a multilayer ferrite bead. In light of this, Würth Elektronik eiSos has developed a new and enhanced measurement technique for SMT components. With this patented technique, it is possible to measure impedances for frequencies higher than 3 GHz with DC bias currents up to 20 A. In order to achieve frequencies beyond 3 GHz, an impedance analyzer is no longer sufficient and a Vector Network Analyzer (VNA) becomes more advantageous. This allows more information to be provided in ferrite bead data sheets and not be restricted from the measurement setup. The impedance analyzer DC bias test fixture utilizes a push and hold action on the ferrite bead onto gold electrode contact pads to measure the values. However, this setup has low repeatability as the connections with the termination is not fixed. In contrast, the new design minimizes this error completely by providing a solid connection, where the device under test (DUT) is soldered down and tested on a PCB. In a real world application, ferrite beads are used soldered onto a PCB; therefore, this measurement method provides a more realistic and equivalent test environment. In addition, to keep measurement consistency, the components are put through the reflow oven past the Curie temperature of the material to solder the parts onto a PCB. This is according to the soldering profile JEDEC J-STD-020E at 260 °C. Correlating to the influence of temperature (Section 4), this forces the elementary magnets to align to a remanent initial free state before the start of a measurement. To prove the measurement data up to 3 GHz can be replicated with the new measurement setup, the WE-CBF HF series was measured and compared. The results of WE-CBF HF (742 841 160) obtained using an impedance analyzer up to 3 GHz and VNA up to 8 GHz are nearly identical, as illustrated in Figure 13. This confirms the validity of the results from the new patented technique.

Figure 13: Graph showing a measurement of WE-CBF HF (742 841 160) from the impedance analyzer and VNA.

The block diagram in Figure 14 depicts the design of the new test fixture and measurement setup with test circuit design. Here the VNA and power supply are remotely controlled to collect the measured data and adjust the DC current. The internal DC bias power available with conventional measurement instruments is limited to a few amperes. Consequently, it is unable to provide currents of more than 5 A. The new jig allows an external power supply to be connected, where the limits are bound by the maximum current of the power supply device and the heating limit of the PCB.

Figure 14: Würth Elektronik’s enhanced test setup and circuit design.

Figure 15: Test board of a SMD ferrite in case size 0805.

This measurement methodology allows valuable information in the high frequency region and high DC bias applications to be provided for better understanding of the component’s performance. A major difference of this setup is being able to consider the environmental settings and procedures. Before obtaining the electrical properties, close to reality environment of the DUT, like soldering the part onto a PCB, is now included in the process leading up to the measurement (Figure 15).

6 Applications

Many EMC problems from electronic devices can be solved with a chip bead ferrite solution in the EMI signal path. Numerous Internet of Things (IoT) applications have wireless integrated into the devices and Würth Elektronik provides multilayer chip bead ferrites to ensure no EMI problems are generated. There are many applications where a ferrite bead are commonly used, these include:

Suppression on signal lines
High frequency RF modules (In the Vcc lines to make sure no EMI problems generated)
Filtering harmonics for mobile communication
Data line filtering in high speed bus systems (CAN, USB, Video, RS232, Wireless LAN)
Filtering circuits
Impedance matching circuits
DC biasing

However, it is interesting to show different perspectives of using a chip bead in different application scenarios. Here we introduce uncommon applications of interest where WE-CBF HF is a suitable alternative to components that are traditionally in these circuit designs.

6.1 Broadband Amplifier 5 MHz – 7 GHz

Broadband amplifiers are often needed in receiving applications when using antennas, to reproduce a wide range of signals with low noise. The bias network is one of the critical aspects in RF circuit design. It determines the amplifier performance over temperature as well as DC bias conditions. The DC voltages applied in an amplifier cannot be applied directly. Therefore, a high impedance component is used to ensure the complete RF signal passes through the device and not back through the DC bias circuit.

Figure 16: Gain amplifier circuit design.

Figure 17: Gain amplifier test board with WE-CBF HF (742861160)

The current bias is seen as a high impedance element to the RF signal, allowing most of the information to pass through the device. Hence supplying a stable current to the output. A standard inductor does not operate over a wide frequency range, having a smaller resistive area profile (roughly in the range of 200 MHz to 2 GHz only). For a standard wire wound ferrite, the parasitics begin to dominate resulting in capacitance and less inductance. An alternative to provide wide bandwidth for broadband use is to substitute the air coil inductor with WE-CBF HF ferrite beads at L₁ and L₂ (Figure 16 and Figure 17). High impedances in the power supply path above 200 Ω can drive the gain block and additionally for impedances lower than 200 Ω the RF signal at the output of the gain block will be attenuated. The advantages of using a WE-CBF HF:

Wide band of frequencies (broadband)
Stable inductance
RF signal passes through to output

6.2 Anti-aliasing filter for Analog-to-Digital-Converter (ADC)

It is usually necessary to place an anti-aliasing filter before an analog-to digital-converter (ADC) to attenuate the unwanted higher frequency noise and signals. The common LC formation of a low pass filter (LPF) may have effects of under damping which creates a resonant peak at a frequency band around the switching frequency of the converter, consequently results in the amplification of unwanted switching noises. Using a ferrite bead in series with the inductor will dampen and smooth out the LPF response and additionally act as an impedance transformer. The standard way to design a filter for an ADC includes RC topologies and LC topologies with or without using operational amplifiers (op-amp). As a first order filter, an RC filter produces a fall of -3 dB at its cut off and a steepness slope of 20 dB/decade step down frequency response which generally is not enough to provide a strong filtering system. An LC filter usually has low resistivity and high inductivity; as a result, minimal damping creates unwanted oscillation. Since an ADC does not have a standard resistive load; therefore, when a peak load occurs, the measure of this load can be identified as a resonating peak at the corner frequency. Instead of attenuating noise, the resonance peak is a reason that causes the noise to amplify. Resistor and ferrite beads can be used to damp a system to reduce the amount of resonant peaking; since a ferrite bead still has a high Q factor, it acts like an inductor in the low frequency region (Section 2). The resistive part of a ferrite bead does not become dominant until reaching the megahertz range. Therefore in general, the WE-CBF HF has higher inductance compared to WE-CBF even in low frequency regions. Due to their construction, a low cut off frequency is achievable (Figure 18).

Figure 18: Gain response of a low pass filter for an inductor and ferrite beads.

The following circuit design with a WE-CBF HF will produce a cut off frequency slope twice the amount to 40 dB/decade and a filter drop of more than -3 dB (Figure 19). This suppresses the resonance peak at the corner frequency so that a smoother transition can occur.

Figure 19: LT Spice model of an anti-aliasing filter with WE-CBF HF (742861160).

The advantages of using an additional chip bead ferrite:

40 dB/decade ramp down frequency response
Suppress the resonance peaking
Takes less space and fewer components than an op-amp circuit design
Overall filter design has lower cost

6.3 Terminating stub for log periodic dipole antenna (LPDA)

Log periodic dipole antennas (LPDA) are now used in many applications operating over a wide band of frequencies. LPDA consists of a number of dipole elements gradually increasing in length where the elements are spaced at intervals following a logarithmic function of the frequency. Printed LPDA layout is an alternative way of applying this antenna array using microstrip printed technology. Designing an antenna on a PCB has different considerations to take into account. For example, not only an accurate calculation of the length and distances of the element, but the compatibility of the microstrip line tracks to the PCB is just as important. In the design phase there may also be PCB size or material budget constraints.

Figure 20: Diagram of a LPDA terminating with a high impedance.

When a higher front-to-back ratio at the lowest frequency is desired, the antenna feeder should include a high impedance termination stub (Figure 20). This shorted stub acts as a reflector to ensure a match is provided to the antenna feeder. This length Z is a quarter of the longest element. Therefore, depending on the operating frequency and size, a suitable length is calculated.

Figure 21: Gain over frequency of antenna with terminating stub

Conventionally, the length of the antenna is used to transform the system to the frequency range to terminate, such as a quarter wave impedance transformer (since the length works at a specific narrow banded frequency), an alternative is to use a real component that also has high impedance in the frequency range. An antenna with stub traditionally starts at the stub and the cut off is far from the stub (Figure 21). Similarly, an antenna with a high impedance and high frequency chip bead operates before the stub and also has a cut off far from the stub. In contrast a ferrite bead with not enough impedance will cut off earlier near the stub, shortening the useable bandwidth. For example, the WE-CBF HF (742862160) or (742863147) fulfill the requirements with its high impedance peak ranging from 100 MHz to 1 GHz. By using a ferrite bead, not only is the same size PCB kept by saving the space that would be occupied by the line transformation, the operative frequency range is also widened (Figure 22).

Figure 22: PCB of an LPDA with WE-CBF HF (742862160).

The advantages of using a WE-CBF HF:

Wider operating frequency (lower frequency region)
Smaller PCB size hence saves space
Lower cost alternative

7 Summary

The WE-CBF HF is a component suitable for suppressing EMI at the higher frequencies commonly found in new and existing device technologies. The WE-CBF is still the component of choice when operating at lower frequencies. Additionally, a newly developed measurement technique for SMT components, providing an insight of its frequency behavior up to 8 GHz and applicable current up to 20 A. Lastly, due to the unique features of the WE-CBF HF, it can also be used in a range of applications not typically associated with chip bead ferrites. Implementing the WE-CBF and WE-CBF HF in your design has never been easier with S-parameters and Spice models available via the Würth Elektronik website. Choose the perfect part and even order the samples directly via REDEXPERT or can be found in the WE-CBF HF SMT Ferrites Design Kit (742841). Additionally, all components are available ex-stock with no minimum MOQ. With the inclusion of the WE-CBF range, circuit designers now have even more flexibility in their ferrite bead selection, ensuring the right component is found for each application.

IMPORTANT NOTICE

The Application Note is based on our knowledge and experience of typical requirements concerning these areas. It serves as general guidance and should not be construed as a commitment for the suitability for customer applications by Würth Elektronik eiSos GmbH & Co. KG. The information in the Application Note is subject to change without notice. This document and parts thereof must not be reproduced or copied without written permission, and contents thereof must not be imparted to a third party nor be used for any unauthorized purpose. Würth Elektronik eiSos GmbH & Co. KG and its subsidiaries and affiliates (WE) are not liable for application assistance of any kind. Customers may use WE’s assistance and product recommendations for their applications and design. The responsibility for the applicability and use of WE Products in a particular customer design is always solely within the authority of the customer. Due to this fact it is up to the customer to evaluate and investigate, where appropriate, and decide whether the device with the specific product characteristics described in the product specification is valid and suitable for the respective customer application or not. The technical specifications are stated in the current data sheet of the products. Therefore the customers shall use the data sheets and are cautioned to verify that data sheets are current. The current data sheets can be downloaded at www.we-online.com. Customers shall strictly observe any product-specific notes, cautions and warnings. WE reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services. WE DOES NOT WARRANT OR REPRESENT THAT ANY LICENSE, EITHER EXPRESS OR IMPLIED, IS GRANTED UNDER ANY PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS IN WHICH WE PRODUCTS OR SERVICES ARE USED. INFORMATION PUBLISHED BY WE REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT CONSTITUTE A LICENSE FROM WE TO USE SUCH PRODUCTS OR SERVICES OR A WARRANTY OR ENDORSEMENT THEREOF. WE products are not authorized for use in safety-critical applications, or where a failure of the product is reasonably expected to cause severe personal injury or death. Moreover, WE products are neither designed nor intended for use in areas such as military, aerospace, aviation, nuclear control, submarine, transportation (automotive control, train control, ship control), transportation signal, disaster prevention, medical, public information network etc. Customers shall inform WE about the intent of such usage before design-in stage. In certain customer applications requiring a very high level of safety and in which the malfunction or failure of an electronic component could endanger human life or health, customers must ensure that they have all necessary expertise in the safety and regulatory ramifications of their applications. Customers acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of WE products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by WE. CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES ARISING OUT OF THE USE OF WE PRODUCTS IN SUCH SAFETY-CRITICAL APPLICATIONS:

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ANP045: Behind the Magic of High Frequency SMT Chip Bead Ferrites

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Tags: chip_bead_ferrite, emi, smt, wireless application, chip bead ferrites, ferrites, Technology, Application Notes, high frequency, emi suppression capability, app note

ANO006: Lifetime of Optocouplers

Würth Elektronik — Tue, 19 Oct 2021 12:50:25 GMT

Current Revision posted to Documents by Würth Elektronik on 10/19/2021 12:50:25 PM

APPLICATION NOTE

Lifetime of Optocouplers

ANO006 BY DOMINIK KOECK

1 Introduction

One of the main considerations in circuit design is the expected lifetime, based on the product itself and the single components included. When considering the components themselves, some can fail completely or degrade in performance with time. For optocouplers, the performance (Current – Transfer - Ratio) degrades over time depending on the operating conditions. This application note gives a quick introduction, how Würth Elektronik eiSos tests the lifetime of optocouplers, how you can calculate the expected lifetime for your application and it will give you tips on how to operate the optocouplers in order to increase the lifetime.

Today, optocouplers are widely used in power supply, home appliances, industrial control and other regulating and controlling applications. As isolation devices, optocouplers were invented in 1963 at IBM [1] and have come a long way from its origin as a simple light bulb coupled with a photo resistor. Maturing technology of solid state light sources i.e. the LED, have lead to a miniaturization of the optocoupler and its wide usage in industry as an isolation device. Today most typical optocouplers consist of an LED that is optically coupled to a phototransistor, photo-Darlington or photo-Triac. From the beginning, the lifetime of the LEDs was an issue, and even though the reliability of LEDs has steadily increased, it is still worth taking its’ lifetime into account when considering optocouplers for applications.

The major root causes of failures in LEDs can be divided into die-bonding related failures and package-related failures [2]. Package related failures, which appear as early life failures, are a result of fabrication errors or miss-handling. Examples of those include wrong soldering profile, increased humidity during soldering or temperature induced stress on bonds, e.g. thermomechanical stress between bonding wires and transparent epoxy, which seals the LED [3]. Die related failures or degradation, which affect the lifetime of LEDs are related to thermal management during operation which is in direct relation to the nominal current of the diode and the heat dissipation. Thermal stress in the LEDs` junction zone results in lower light and thus has a direct impact on the component´s efficiency (CTR factor) [4].

This Appnote will focus on the long-term failure of optocouplers that is related to the decreasing light output of the LEDs with time, due to long-term operation and accompanying failure mechanism, in this case a form of the so-called electromigration.

2 Optocoupler

2.1 Basics

The simplest optocoupler consists of an LED optically coupled to a phototransistor but being electrically isolated from each other. The LED is turned on and off to emit light, which switches the phototransistor on, or off. An important parameter describing the optocouplers’ performance is the Current – Transfer – Ratio (CTR). It is defined as the ratio of the current flowing through the LED, I_F and the current flowing through the phototransistor, I_C .

CTR = I_C /I_F ⋅100% (1)

In Würth Electronics’ optocoupler portfolio, the customer has the possibility to choose ratios from 50% up to 600%, divided into different range of bins, depending on the customer’s application.

Figure 1: Würth Elektronik optocouplers using an LED and phototransistor for interaction between electrically separated circuits.

2.2 Introduction of lifetime testing

The lifetime of optocouplers can exceed several decades, therefore an accelerated stress test is performed, using increased operation conditions. In semiconductors, many different degradation mechanisms exist. Some of them are the electromigration [2], nucleation and growth of dislocations [3] and metal diffusion [2]. These degradation mechanisms can be described with specific activation energies E_A, which can be viewed as the energy required to activate this failure mechanism. Depending on the specific mechanism, this activation energy varies between E_A = -0.2 eV and E_A = 1.4 eV [4]. For LEDs, high current density and high temperature leads to diffusion of atoms out of the active region leaving point-defects [3]. These crystal defects increase the number of non-radiative recombination centers, thus decreasing the quantum efficiency of light creation and hence decreasing the CTR of the optocoupler. This mechanism can be described similar to the electromigration of Al atoms originally described by J. Black in 1969, where he described the median time to failure of a device with following formula [2].

1MTF =A·J²·e^E_Ak_BT (2)

MTF:	Median time to failure [h]
A:	A constant [5], including scattering cross section area
J:	current density [ `Acm`² ]
`E`_A :	Activation energy [eV]
`k`_B :	Boltzmann constant 8.617 `eVK`
T:	Temperature [K]

For reliability testing it is of great interest to reduce the stress testing time but being able to predict the resulting lifetime under normal use conditions. According to equation (2), the MTF reduces with the current density and the temperature. When testing optocouplers with increased temperature and current, the degrading mechanisms happen much faster than they would under normal operation conditions with smaller temperature and lower current. Therefore, an acceleration factor can be calculated by dividing equation (2) with stress test conditions and normal operation conditions. This results in the widely known Black formula [2] :

AF=(I_testI_norm )^N·e^{E_Ae^k_B}·(1T_norm −1T_test ) (3)

AF:	Acceleration factor median time to failure [h]
`T`_test:	Temperature used in stress test [K]
`T`_norm:	Typical field use temperature [K]
`I`_test:	Forward current used in stress test [A]
`I`_norm :	Typical field use forward current [A]
`E`_A :	Activation energy [eV]
N:	Exponent [5] N=2

As mentioned above, there is a mixture of different failure mechanisms and corresponding activation energies. The effective activation energy can be found as a fit parameter from repeating stress tests at different temperatures. However, to comply with industry standards an average activation energy of E_A = 0.7eV is used as a typical value for discrete semiconductors [4]. The application of this formula is demonstrated for the 14081614xxx/14081714xxx Würth Elektronik optocouplers, which were tested for 1000 h under increased temperature T_test = 110 °C and an LED forward current I_test = 30 mA. The phototransistor is less prone to degradation than the LED [6]. Therefore, for the scope of this application note, it is assumed that the change of CTR is due to the loss of luminosity of the LED and not due to phototransistor degradation.

In the following, an example of the acceleration factor calculation and its application to stress test results is shown. The test duration is 1000 h at T_test = 110 °C and a LED forward current I_test = 30 mA. If the optocoupler is used with 100% duty cycle at a forward current of Inorm = 5 mA and is operating at ambient temperature Tnorm = 80 °C, the acceleration factor is AF = 218. So, according to the Black formula (3), the acceleration stress test of 1000 h simulates a normal field use of almost AF ⋅ 1000 h = 218 ⋅ 1000 h ≈ 25 years.

Figure 2 shows the CTR degradation that is expected within these 25 years. It shows for the Würth Elektronik optocouplers that in average, no more than 5% degradation of the CTR value is expected.

Figure 2:Expected CTR degradation with field time. Parameters for field use: 100% duty cycle, 80°C ambient temperature, 5 mA forward current. Stress test parameters:

1000 h test, 110°C test temperature, 30 mA forward current

The Average - 2σ relative CTRs are also given as a dashed line. Statistical distribution gives the variance 2σ as the amount of variation in the data. In other words – around 68% of the relative CTR values are inside of 1σ distance from the average value. Similar, 95% of the relative CTR values is within the 2σ confidence interval. When considering figure 2, the 2σ curve shows the lowest expected relative CTR degradation is not less than 87% within 25 years.

2.3 Parameters for improving optocoupler lifetime

In figures 3 and 4, the average CTR degradation is shown in dependence on the normal operation forward current IF and the normal operation ambient temperature T. It is important to note that the expected CTR degradation can be reduced by reducing the operation temperature and driving forward current of the LED.

Figure 3: Forward current dependency on expected average CTR degradation with field time. Parameters for field use: 100% duty cycle, 80°C ambient temperature, forward currents as indicated in the graph.

Stress test parameters: 1000 h test, 110°C test temperature, 30 mA forward current.

Figure 4: Temperature dependency on expected average CTR degradation with field time. Parameters for field use: 100% duty cycle, 5 mA forward current, ambient temperatures as indicated in the graph.

Stress test parameters: 1000 h test, 110°C test temperature, 30 mA forward current.

3 Summary

Optocouplers, as all other components on the electronic board need reliable performance for many years in harsh applications such as industrial control and power supplies. As the reduction of the LEDs’ performance is one of the mechanisms leading to a degradation of Current Transfer Ratio in optocouplers, it is worth describing and understanding this effect. Würth Elektronik eiSos performs extensive quality tests to provide products with outstanding reliability performance. Given the reliability data provided and the presented equations, we could suggest some design guidelines to increase the lifetime of optocouplers:

Decrease the effective operating time of the optocoupler.
Decrease the operating diode current and power dissipation out from the LED by larger vias and pads in the layout
Avoid peak transient currents through the LED
Adjust the duty cycle of the LED, in order to keep the average current low.

Additionally, in case of critical products regarding reliability like e.g. devices with medical application, reliability of the optocoupler can be increased by a burn-in procedure. But to avoid damage of the devices the burn-in parameters should be kept below the absolute maximum ratings. Keeping these rules in mind, the designer can expect a high stability of Würth Elektronik optocouplers performance for many years.

A. Appendix

A.1. Literature

[1] I. Akmenkalns et al., "Four Terminal Electro-Optical Logic". United States of America Patent 3417249, 17 December 1963.

[2] J. Black, ""Electromigration - A Brief Survey and Some Recent Results"," IEEE Transactions on Electron Devices, 1969.

[3] M.-H. Chang, D. Das, P. Varde and M. Pecht, "Light emitting diodes reliability review," Microelectronics Reliability, no. 52 , p. 762–782, 2012.

[4] Component Technical Committee, "Failure Mechanism Based Stress Test Qualification for Discrete Semiconductors in Automotive Applications," Automotive Electronics Council, 2013.

[5] J. R. Black, "Mass transport of aluminum by momentum exchange with conducting electrons," IEEE International Reliability Physics Symposium, 1967.

[6] J. B. H. Slama, H. Helali, A. Lahyani, K. Louati, P. Venet and G. Rojat, "Optocouplers Ageing Process: Study and Modeling," in International Conference on Electrical Engineering Design & Technologies, Hammamet Tunisia, 2007.

[7] T. Bajenesco, "CTR degradation and ageing problem of optocouplers," in Proceedings of 4th International Conference on Solid-State and IC Technology, Bejing, China, 1995.

IMPORTANT NOTICE

CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES ARISING OUT OF THE USE

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ANO006: Lifetime of Optocouplers

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Tags: testing, Application Note, led, optocouplers, Application Notes, app note, lifetime

ANP096: What do rated current values mean?

Würth Elektronik — Mon, 11 Oct 2021 12:09:18 GMT

Current Revision posted to Documents by Würth Elektronik on 10/11/2021 12:09:18 PM

APPLICATION NOTE

What do rated current values mean?

BY DR. RICHARD BLAKEY // ALEXANDER GERFER

1 Introduction

Despite the efforts of some passive magnetic component manufacturers, the concept of rated current continues to be a point of contention in the power electronics industry. There remains a difference of opinion in how manufacturers should report it and how design engineers can use it. Is it an absolute parameter? Are rated current values from different manufacturers directly comparable? The answer to these questions is no. Some manufacturers take advantage of these misconceptions and are deliberately vague about the measurement method used to obtain rated current values to achieve favorable results.

The operating temperature of a power inductor is an important parameter for any application. Electrical parameters, such as inductance and therefore the magnetic saturation, can vary considerably over temperature ranges. The operating temperature of the inductor in an application setting is defined by self-heating and the ambient temperature (Equation 1).

T=T_Amb+△T (1)

where T is the operating temperature of the inductor, T_Amb is the ambient temperature and ΔT is the self-heating of the part.

The self-heating is a result of the heat generated by the electrical losses of the inductor. In an SMPS application setting, losses are caused both by DC and AC currents. However, this is highly dependent on the conditions of the SMPS, such as switching frequency and duty cycle. To simplify testing thermal dissipation, the self-heating of parts is measured when considering only DC copper losses (Equation 2).

P_DCLoss=I²×R_DC (2)

where P_DCLoss (W) is the copper losses of the inductor, I (A) is the current of the inductor and R_DC is the resistance of the inductor (Ω). From this equation it is clear that parts with higher R_DC will generate more heat for the same current applied.

The heat generated from the copper losses, then conducts to the PCB trace through the solder pads, and to the core where it is dissipated through convection and radiation into the surrounding air. When current is applied to the part, the temperature of the part will continue to increase until an equilibrium is reached between heat generation and heat dissipation. The ability of the part to dissipate heat is defined by the thermal resistance of the component (Equation 3).

θ_WA=(△TP_DCLoss ) (3)

where θ_WA is the winding to ambient thermal resistance. Although this formula is simplified and only considers DC current, it still gives important information about how well the part can dissipate heat. More information based on the end application can be obtained using REDEXPERT, an online tool that accurately calculates losses and temperature rise for specific SMPS conditions. At this stage, it is important to clarify terminology and principles regarding electrical and thermal parameters. The derivation of thermal parameters evolved in much the same way as electrical parameters with similarities in Ohm’s law (Equation 4) and Newton’s law of cooling (Equation 5). For this reason, analogies can be drawn between electrical and thermal parameters (Figure 1).

△V=IR (4)

△T= θ (5)

Figure 1: Visual representation of Ohm's law and Newton's law of cooling.

Heat flows through thermally conductive paths as electrical current flows through electrically conductive paths, Therefore heat generation is usually represented as a current source. Analogous to voltage drop across a conductor, the amount of current that can flow is limited by the conductive/resistive properties of the material, the cross section it flows through and the length of the path. This is equally true for temperature differentials between two thermally conductive paths. When considering a simple inductor model, there are two conduction paths of heat, through the winding to the solder pad and through the core to the outer surface of the core (Figure 2).

Figure 2: Visualization of thermal transfer paths in a simplified power inductor. Conduction through the solder pads is divided between the pads ( θ_WP1 and θ_WP2 ).

where θ_WC is the winding to core surface thermal resistance and θ_WP is the winding to solder pad thermal resistance.

However, what additionally comes into play is the effectiveness of the thermal earth. The lower the ambient temperature is, the greater the temperature differential and the larger the heat flow. For a PCB mounted inductor, the surface area of the core and the PCB trace size together with its surface area represent the thermal resistances that connect the thermal circuit to thermal ground. Therefore, a full yet simplified thermal model of a power inductor can be defined (Figure 3).

Figure 3: Equivalent thermal model of a power inductor.

where θ_CA is the core surface to ambient thermal resistance, θ_PT is the solder pad to trace thermal resistance and θ_TA is the trace to ambient thermal resistance. What this thermal equivalent circuit demonstrates is that we essentially have parallel resistors and a number of voltage dividers. If one resistance value changes, the flow of heat (“current”) will change therefore resulting in temperatures (“voltage”) changing at different parts in the circuit.

Consider increasing the size of the part while keeping all other parameters equal. This will significantly decrease θ_CA resulting in more heat flowing from the winding, through the core to the ambient air and less flowing through the solder pad to the trace and ambient air. Indeed this is what is typically observed with larger power inductors transferring more heat to the air whereas smaller inductors with smaller surface area transfer a greater proportion of heat to the PCB. Now consider increasing the thickness of the winding meaning lower thermal resistance from the winding to the trace. This will mean a lesser proportion of the heat will flow from the winding to the core surface with more flowing to the PCB trace. This behavior is typically observed in high current power inductors that use thicker winding to handle higher currents. Therefore, having a thicker wire both decreases self-heating and increases heat dissipation.

Both of the cases above facilitate the flow of heat from the winding to the ambient resulting in lower self-heating of the part. This means they can be operated at higher currents than smaller inductors that use smaller diameter wire.

2 How is rated current measured?

Simplified, the method comprises passing DC current through the part, measuring the hottest part of the inductor, waiting for the temperature to stabilize, and then recording the temperature difference from ambient temperature. The DC current begins low and steps up with each stabilized temperature raise recorded resulting in temperature vs. current graph. However, the specifics of the measurement technique can greatly affect the result of the measurement.

Consider including forced airflow (convection) over the part. This would reduce θ_CA , increasing the amount of heat that can be dissipated, in turn increasing the rated current of the part. Indeed some manufacturers may not specifically note if any airflow is used, leaving room for doubt if the higher rated current values are comparable with values from other manufacturers.

Another factor that has an influence on the inductor temperature rise are the PCB trace dimensions. As we have seen with the winding, a greater cross section area reduces thermal resistance. The same is true of PCB trace dimensions. Wider traces and increased copper thickness will reduce θ_PT increasing the flow of conducted heat from the inductor. This also reduces θ_TA as the greater surface area of the trace increase heat convection and radiation to the ambient. Again, this information may not be specified in datasheets, leaving room for interpretation by the design engineer.

3 What does this mean for rated current?

As can be seen, rated current values can be manipulated in such a way as to have potentially remarkable thermal characteristics and performance. But it also means the design engineer is selecting parts using incomparable data. This dilemma faced the semi-conductor industry some decades ago where design engineers found it increasingly difficult to directly compare ICs. For this reason associations like JEDEC (Joint Electron Device Engineering Council) began to standardize measurement procedures and the form of thermal performance reporting. What standardization brought was transparency and comparability. Thermal characteristics could not be artificially manipulated to be used as marketing data. However, because of the diverse forms of power inductors, it was some years until a requirement for the standardization of rated current became apparent.

4 How does WE measure rated current of power inductors?

Würth Elektronik endeavors to be transparent with the disclosure of the measurement procedures used and the reporting of rated current (I_r ) data of the temperature rise of power inductors. The method used is based upon section 6 of the IEC 62024-2:2020 standard. The test PCB is contained within a box of roughly 20 cm on each side. The test PCB does not contact directly with the surrounding box. Only natural convection occurs, with no forced convection applied to the test PCB. Würth Elektronik measurement differs from the standard in that an infrared camera is used in place of thermo-couple. This is done to eliminate measurement error caused by placement of the thermocouple. In this way, the hottest external area of the magnetic core is measured. Current is passed through the sample with the temperature allowed to stabilize to less than 1 °C per minute.

Due to the range of sizes and construction types of the Würth Elektronik portfolio, a number of PCBs have been used, but primarily follow that of section 6.3 of the standard (Figure 4). For IEC I_ClassA PCBs, the trace width is different dependent on the rated current (Table 1).

Irrespective of the PCB used, it should be remembered what rated current values on datasheets actually represent. These values are not absolute that can be applied to any application. They are there to give a rough guide as to the current range they can be used in and to serve as a parameter for comparison with other power inductors. The thermal characteristics of a power inductor are influenced by so many factors, it is impossible to characterize the behavior in the final application. This is where precise knowledge of the measurement technique becomes extremely useful to the design engineer. When all parameters are known, rated current values cannot be manipulated facilitating manufacturers to be transparent and consistent avoiding the sham of rated current.

Figure 4: Diagram of PCBs used for rated current measurements

5 Comparison of inductors

In the following section, a Würth Elektronik eiSos power inductor from the WE-LHMI (744 373 460 68) product family is compared with a power inductor of similar construction from a competitor. Additionally, an inductor from the WE-XHMI (744 393 46 100) series is compared with a comparable competitor’s power inductor.

Rated Current Class	Rated current of inductor Ir (A)	Trace width W (mm)
`I`_ClassA	`I`_r≤1	1±0,2
	1<`I`_r≤2	2±0,2
	2<`I`_r≤3	3±0,3
	3<`I`_r≤5	5±0,3
	5<`I`_r≤7	7±0,5
	7<`I`_r≤11	11±0,5
	11<`I`_r≤16	16±0,5
	16<log`I`_r≤22	22±0,5

Table 1: Trace width (W) used for I_ClassA PCBs

Interestingly, in both comparisons the competitor parts have a higher rated currents stated in their datasheets despite having a higher RDC than the WE parts (Table 2). The rated current of both inductors were measured and compared using the IEC 62024-2:2020 measurement set-up. For each comparison measurement, the same measurement set-up, the same contacting method and the same type of measurement board were used. The WE-LHMI and its competitor on the I_ClassC and the WE-XHMI and its competitor on the I_ClassD .

Ref. no.	Size	Inductance (μH)	Rated Current (A)	Performance Rated Current (A)	Saturation Current (A)	DC Resistance (mΩ)
744 373 460 68	7030	6.8	3.4	4.45	8@ 20% L drop	54
Competitor 7030	7030	6.8	4.5		8@ 20% L drop	54

744 393 46 100	6060	10	5.0	6.4	9.7 @ 30% L drop	26.5
Competitor 6060	6060	10	7.0		7.6 @ 30% L drop	27

Table 2: Comparison of datasheet parameters

Figure 5: Thermal images of WE-LHMI 744 373 460 68 (upper) and competitor 7030 (lower)

Figure 6: Thermal images of WE-XHMI 744 393 46 100 (upper) and competitor 6060 (lower)

Figure 7: Self heating comparison of WE-LHMI 744 373 460 68 (red) with competitor 7030 (black)

Figure 8: Self heating comparison of WE-XHMI 744 393 46 100 (red) with competitor 6060 (black)

The temperature of both coils were measured with a thermal imaging camera. DC current was applied to the test boards until at least 65 °C was reached, 40 K above ambient 25 °C (Figure 5 and 6). Despite having a higher rated current value on the datasheet, the competitor 7030 part had a lower heating current of 4.4 A when compared to the 4.45 A of the WE-LHMI, measured on the same I_ClassC PCB (Figure 7). Similarly, the WE-XHMI had similar heating current values to the competitor 6060 part, 6.4 A compared to 6.6 A (Figure 8) when measured on an I_ClassD PCB. It must be noted that small deviations in the self-heating curve can be caused by component tolerances, especially in RDC, and can occur even when comparing coils of the same construction originating from the same series from the same manufacturer.

This raises questions about how manufacturers achieved this level of heat dissipation. The use of bus bars, heat sinks, and forced convection can all be used to achieve higher heat dissipation. This should be remembered when comparing rated current values and selecting parts for prototyping.

6 Performance Rated Current

For some power inductors, an additional rated current, specified as Performance Rated Current (I_rP), may be included on the datasheet. This is the rated current of the part measured on an I_ClassC or I_ClassD PCB. Some may argue, why use I_ClassC and I_ClassD PCBs for testing the rated current? As discussed, increasing the PCB area and thickness increases heat dissipation, leading to higher rated current values. Essentially, the larger trace area and thicker trace layer is to replicate the effects of using multilayer boards, heat-sinks and forced convection that are increasingly being utilized by electrical engineers. This is especially noticeable in automotive and e-mobility applications.

Consider the WE-LHMI (744 373 460 68) which has a rated current of 3.4 A (Figure 9a) and a performance rated current of 4.45 A (Figure 9d) measured on a WE Legacy and I_ClassC respectively (Figure 10a and 10d). Using the part on a 5 mm wide trace at the rated current results in a temperature rise of 49 K (Figure 9b and 10b), well within the operating temperature of the part. If the application includes forced convection (FC) for reasons of thermal management the same part on the same PCB at the same current results in a 19.5 K temperature rise (Figure 9c and 10c). Although this may be desirable in some applications, there is a lot of thermal “head room”. When the performance rated current of 4.45 A was applied to the part on a 5 mm wide trace with FC, the temperature rise was 34 K.

This comparison demonstrates how the performance rated current ( I_rP ) parameter mimics application conditions that implement thermal management methods. Indeed, in this scenario the inductor could be operated at even higher currents as long as it is below that of the inductance drop ( I_SAT ) permitted by the specific application. It also demonstrates that I_r and I_rP are numbers to compare and guide in the selection of inductors before prototyping. It should be remembered that these are basic parameters, considering only DC currents with no additional heat generating parts on the PCB. In real conditions, AC losses and the thermal effects of surrounding components would also have to be considered. The actual temperature rises seen in the end applications will vary considerably dependent on the conditions.

7 Conclusion

Rated current values found on datasheets serve as a guide for the selection of power inductors. However, the temperature rise in power inductors can be influenced by many factors that are not always reported in datasheets by all manufacturers giving a false sense of what the rated current values actually represent.

Measuring and comparing similar parts from competitors, demonstrates despite large differences in datasheet rated currents their performance can be very similar when using the IEC 62024-2:2020 standard to define rated current. Comparing the behavior of a single inductor in different conditions demonstrates how Ir and performance I_rP parameters may be used to gauge the performance of an inductor under application conditions.

As an early implementer of the IEC 62024-2:2020 standard, Würth Elektronik eiSos brings new levels of trust and transparency to the rated current values of power inductors, demonstrating no form of manipulation or misinterpretation during measurement or reporting.

Figure 9: Self heating comparison of WE-LHMI 744 373 460 68 on different PCBs and conditions. I_r = WE-LHMI measured on the WE legacy PCB, IrP = WE-LHMI measured on I_ClassC PCB, 5 mm = WE-LHMI measured on 5 mm trace width,5 mm (FC) = WE-LHMI measured on 5 mm trace width with forced convection and I_SAT= the magnetic DC saturation of the WE-LHMI.

Figure 10: Thermal images of WE-LHMI 744 373 460 68 on different PCBs and conditions.

IMPORTANT NOTICE

CUSTOMERS SHALL INDEMNIFY WE AGAINST ANY DAMAGES ARISING OUT OF THE USE OF WE PRODUCTS IN SUCH SAFETY-CRITICAL APPLICATIONS.

USEFUL LINKS

Application Notes: http://www.we-online.com/app-notes

REDEXPERT Design Plattform: http://www.we-online.com/redexpert

ANP096: What do rated current values mean?

Product Catalog: http://katalog.we-online.de/en

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