Ground Paths - Useful explanation for anyone who is confused.

RE: Ground Paths - Useful explanation for anyone who is confused.

Andrew J — Sun, 31 Jan 2021 19:29:23 GMT

I found this video which is an excellent addition to the paper and explains a lot more in approachable detail. It is long - 2 hours + 20 mins Q&A - but worth it. I ended up watching it twice!!

[View:https://www.youtube.com/watch?v=ySuUZEjARPY:740:466]

Here's some highlight notes. If some of them don't make sense it's probably because I've paraphrased too much to keep them succinct! I've added some timings for info that I found particularly useful/interesting.

Grounding Summary in PCB

Ground is not zero volts: current and resistance means voltage (drop). Ground is not a ‘sinkhole’ for removing noise from a circuit

“Energy” is not in the Voltage or Current it is in the fields - electric and magnetic fields - and the fields travel through the dielectric and not the traces/planes. Traces/planes act as a wave guide steering the energy between points - the path of lowest impedance. Energy creates the voltage across the copper and current in the copper; fields traces in the dielectric.

Energy creates the voltage and current in the forward line and simultaneously in the return line. Current does not flow from A to B and then return from B to A.

Fields surround the trace in the dielectric: the electric field generates current in the traces/planes which result in the development of a magnetic field. These fields spread out and couple into nearby traces and planes: crosstalk. In a strip line (inner layer trace between planes), the fields are contained by the planes; in a micro strip (outer layer trace) the fields may be contained by an underlying plane but spread out much further in the air around the trace. Crosstalk is worse in micro strip.

Return Path

Designing the return path is about containing these fields.

[27:29]

High Frequency:

The energy fields follow the path of least impedance: this is the path of lowest inductance and the path of highest capacitance coupling. Impedance is (simplistically) Inductance / Capacitance so we want LOW inductance and HIGH capacitance.

Inductance is caused by the mass (inertia) of the magnetic field developed between the forward and return paths - large space between these paths means greater magnetic field and greater inductance. Inductance can be lowered by reducing the space between the forward trace and return trace - best is travel above/below each other and thus the dielectric space is small.

Capacitance can be increased by reducing the space between the forward trace and return trace - best is travel above/below each other.

Avoid capacitance coupling with non-return traces by keeping the space between them 2-3x greater than the space to the return.

Low inductance and high capacitance is all about proximity.

Low Frequency:

The energy fields follow the path of least resistance because inductance is related to frequency and thus negligible compared to resistance. Impedance is (simplistically) Resistance / Conductance. So at DC, energy follows the path of least resistance which is the shortest path between source and load. It spreads out more than high frequency.

Frequency Relationship:

NOTE: the formula for impedance, non-simplistically, is:

Z=√(R+JθxH)(G+JθC)

Jomega is the frequency domain so you can see that at DC, where Jomega is zero, inductance and capacitance don't count so it's resistance and conductance that matter; conversely, as frequencies rise, inductance and capacitance play a bigger role and at some point Resistance will become irrelevant. That's essentially why at DC the current follows the path of least resistance and at high frequency the path of least inductance.

As frequency rises from DC, more of the energy returns on the path of least impedance and less on the path of least resistance. At 100kHz, hardly any energy is following the path of least resistance and at 1MHz practically none.

Coupling

[36:35]

The fields will couple into nearby traces/planes and energy returns will follow those traces/planes. If the nearest plane is a Power plane, then it will return via that power plane. At higher frequencies, i.e. faster rising edges of a signal, the energies will tend to couple into nearby traces and use those as a return path. Hence, keep the distance so the easiest place to couple to is the return path.

[38:05] / [39:30]

******

At low frequency, energy fields need to be channeled: i.e. wide ground trace underneath the forward trace; with a ground plane the energy fields will spread much wider

At higher frequencies, energy fields will tend to ‘self-channel’ over a ground plane.

******

At low frequency, a power plane is not needed: route power

Return energy will be around 3x trace width (w + W + w); keep other traces outside w, and w away from the edge of any plane. Make the return path 3W.

4-Layer stack up

Poor stack up can cause EMI problems because of how the fields couple. Not necessarily bad for signal integrity.

[49:35] [1:40:13]

Signal layers (traces) need to couple to a ground layer (traces) immediately adjacent in the layer stack up.

In a board, the dielectric is typically thinner between layers 1 and 2, and 3 and 4, and the core of the board between 2 and 3 is much thicker. Fields travel in the dielectric so we want to keep the coupling dielectric space narrow. The return will be on the closest layer.

If a signal via’s to another signal layer, place a ground via very close to facilitate proper return coupling.

Worst:

Signal - Ground [CORE] Power - Signal

Signal - Power [CORE] Ground - Signal

OK - Micro Strip

Signal/Power - Ground [CORE] Ground - Signal/Power

BEST - Strip line

Ground - Signal/Power [CORE] Signal/Power - Ground

__________________________________________________

Again, for layout it's easier to state the guidance than it is to actually follow it in practice! For example, it's easy to say "at low frequency route a return ground trace 3w under (or above) the forward trace" but that's a lot of space to use and is likely to be impracticable with components on one of those layers. So, everything is still a tradeoff but I suppose like all things, those decisions can be made from a point of better understanding.

RE: Ground Paths - Useful explanation for anyone who is confused.

Andrew J — Sun, 24 Jan 2021 16:32:33 GMT

Following on again for a more complicated real-life example. It's actually not a complicated circuit but it's potential layout again introduces complications that never get covered off in white papers.

I have a second PCB laid out, again, using a star ground/power approach. This is a 4-layer board: Signal-Ground-Power-Signal. It’s noticeable that there are “islands” of functionality: these are distinct circuits that are driven through an I2C connection and so are genuinely independent of operation:

Digital, isolated side driving an MCU, probably an Arduino; U8 is an I2C isolator and U9 is a digital isolator
RTCC: uses a crystal and has a potentially noisy ground; there are keep-out zones under the crystal for all layers except ground
Fan: off-board 12V fan driven by a MOSFET controlled by a PWM signal on its gate
DAC
ADC
4.096 Reference voltage
EEPROM

The -5V rail drives the -VSS input on an Opamp in the ADC circuit, nothing else (in order to route, part of the power and ground traces must run on the top signal layer.) The 12V rail drives the fan, nothing else; everything else operates from the 5V rail. I’m able to keep these rails and their respective grounds separate (ultimately, they have a common reference point on a power PCB shown above in this thread)

I've kept the fan and RTCC circuits away from other circuits and close to the board connectors.

Ground Routing:

[View:/resized-image/__size/620x623/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/8422.contentimage_5F00_193699.png:620:623]

You can see that the ground routing for the three rails are kept separate. The 5V rail has a star point in the middle of the board to which all these circuits, except RTCC, route. I’ve used a plane under each island rather than separate ground connections to keep that routable - I may be able to star each island as well but I haven’t tried it. The RTCC is the exception: because of its potentially noisy ground due to the crystal I’ve routed that straight back to the source point (5V connector.) The main trace from the 5V connector to the star point is 3mm; the others are 2mm although none of this is high-current.

The ADC is in front of the analog circuitry and so the ground return for signals do not pass through the analog components.

Power Routing:

[View:/resized-image/__size/620x621/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/2158.contentimage_5F00_193700.png:620:621]

Power traces run above the ground traces and have a star point at the same position in the middle of the board.

The ADC section is laid out with two power planes: one for the ADC and one for the analog components. I’m not sure if this is the best solution as it means the power trace for the analog components does not follow its ground trace so the return path forms a small loop (power in by D7, return by U11)

Signal routing:

[View:/resized-image/__size/620x620/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/4705.contentimage_5F00_193701.png:620:620]

For the most part, I have routed signals along their ground return route - in this image, the power layer is hidden. I think the main signals to consider are those routing from U8 and U9 on the left of middle. These are the I2C lines and a number of other “digital” signals, by which I mean they will either be a nominal 0V or a nominal 5V to help control ICs in the circuitry. The exceptions are:

I2C: SDA and SCL switch high and low

FAN trace from U9 over to the Fan Control island: this may be a PWM signal to drive a fan, I haven’t decided yet whether it’s just easier to turn it on/off based on temperature and hysteresis.

RTCC_MFP: a multi-function pin on the RTCC that can either ‘alarm’ (go high) or generate a square wave.

The signals to the RTCC cross the PCB direct to the relevant circuitry but the ground returns are potentially more convoluted depended on what is deemed ’the source’. If the source is the digital isolators U8/U9 then, yes, convoluted; if the source is the 5V connector then straightforward. The RTCC return path would form an “S” if traced to the 5V connector, down to the star point and back to the isolators U8 and U9; The fan signal return either (a) doesn’t really matter as per the brief discussion with Gene above; or (b) is via the 12V connector, off-board back to the 15Vin connector (in the power board PCB above), back on-board through the 5V connector, down to the star point and back to the isolators.

So taking a star routing approach to ground seems to restrict the routing of the signal traces in order to avoid return loops being created. It also enforces a close routing of these traces. I don’t know how much of this is an issue or not.

The RTCC ground trace could be re-routed from the 5V connector to the main ground trace leading from the star point to the 5V connector which would allow its I2C and MFP trace to route over a ground trace for more of its routing.

I can also see how laying out the 5V ground (and power) as a plane, albeit irregularly shaped, could aid signal routing, direct DC return paths as well as under-trace AC returns (noise I guess). Obviously even a ground plane wouldn’t resolve the FAN signal across to the 12V driven circuit.

Perhaps a reasonable approach with this board is a ground plane as the power PCB uses a Star approach and the high currents are to the isolated side and the fan.

Thoughts?

RE: Ground Paths - Useful explanation for anyone who is confused.

Andrew J — Wed, 20 Jan 2021 16:36:54 GMT

Following on, here's a slightly more complicated situation. Until recently, none of this would have figured into my consciousness when creating PCBs, but the Maxim paper has done a good job of allowing me to understand better what is going on. It's once we get into the real world and out of very simple use cases described in white papers, where every example given matches perfectly to the points being made, that the deficiencies in explanations become apparent! Perhaps this discussion thread should have been a blog post.

[View:/resized-image/__size/620x408/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/2703.contentimage_5F00_193693.jpg:620:408]

Here, I have a situation where I'm keeping two power rails separated with star ground, particularly as the 12V supply is somewhat noisy. However, I have a 'driving' signal from an IC on the 5V rail sending a signal to an IC on the 12V rail (in actuality, it's a voltage signal to the gate of a MOSFET to turn on a 12V fan.) The actual setup of the above is that one PCB has the power provision and another PCB has the control provision. Connectors pass the 5V/GND and 12V/GND from the Power PCB to the Control PCB:

[View:/resized-image/__size/279x339/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/7573.contentimage_5F00_193694.jpg:279:339]

I'd originally thought that there was no interaction between 12V supplied components and 5V supplied components, forgetting this one signal that actual joins them! Blast it!

So the question is: how does that signal return to source? The AC element wants to be back at the ground of C2; the DC element - and here I'm not sure - wants to be back at the ground pin of the 5V regulator (Source for IC1) OR it wants to be back at the ground pin of the 15V supply (the ultimate source.) Clearly the ground reference for both rails is the same but these are set up using a star ground approach to keep the current/noise paths controlled.

So what to do? If I lay a ground plane under IC1, IC2, C1 and C2 then there would be an obvious return path for the signal BUT I'd be tying the noisy ground of the 12V supply to the ground of the 5V supply AND there would be a ground loop established. That's no good.

Option 1: move the star point from the 15V supply, change connectors and ground routing:

[View:/resized-image/__size/620x414/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/2625.contentimage_5F00_193695.jpg:620:414][View:/resized-image/__size/280x339/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/7506.contentimage_5F00_193696.jpg:280:339]

(The star point could be moved from between the two regulators to the middle pin of the connector) This avoids a ground loop at the potential expense of longer ground routing; and the 12V noisy ground could impact the 5V ground and the 5V regulation, which regulates through its ground pin.

Option 2: keep the original routing but place an opto-coupler between IC1 and IC2 with the signal from IC1 routing to that - the signal then would 'transfer' across and proceed to IC2. Both grounds would be kept separate with clear return paths for the signals. It's another component on the board but seems like a reasonable solution for this one signal.

[View:/resized-image/__size/620x421/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/4834.contentimage_5F00_193697.jpg:620:421]

(DC follows the ground traces and don't take the direct route shown.)

I'm leaning towards option 2 although it is a little bit more complicated because it allows me to keep the rails seperate. I've not done any thing with opto couplers before but I can imagine that it would take some 'tuning' to avoid false signalling due to noise and it's potentially likely to draw too much current from IC1 (I haven't checked yet; on the IC2 side it will be fine) so the whole thing may be a non-starter in which case I would have to fall back to option 1.

Anyway, I thought it might be of interest to others reading this thread. If anyone has a better idea or pointers then please do comment.

RE: Ground Paths - Useful explanation for anyone who is confused.

Andrew J — Mon, 18 Jan 2021 18:50:04 GMT

Hi [mention:d214a0a0f5594ee19515b2a3782e7070:e9ed411860ed4f2ba0265705b8793d05],

I've had a crack at star routing ground for a Power PCB I'm creating and I'd be interested in your view on how I've done that. The power board will be used to drive analog / digital components on a separate board via the connectors along the bottom edge. I took the view, from what I've queried above, that the main DC source would be the 3-pin Power Connector so all DC will ultimately route back there - POINT A. If it turns out that the other points are the source, the actual path to these from the load connectors on the bottom edge is short. The only thing that I wasn't sure of was whether the 12V regulator was the 'source' for the +5V and -5V regulators.

Some notes:

The load connectors on the bottom edge can't be moved as their position helps the layout of the second board.
The power connectors are on the right hand edge: the 3-pin connector is the main input; the 2-pin connector is an alternate power source. Not shown is its switched ground connection - Pins 2 on these connectors are connected.
Noisiest components are U6, a switching DC-DC converter, and U3, a charge-pump inverter.
Heaviest current is circa 350mA from U6; other currents are much smaller (10's of mA)
The large trace at the top from U6 is 3mm; other traces are 2mm apart from those connecting the Test Points.
Ground traces can be routed solely on the bottom layer which is shown; Power traces are not shown and will be confined to the top layer. There are no signal traces.
This is all DC, there are no AC elements (except noise)
Linear Regulators U7, U1, U5 and U2 grounds connect to the load connectors as they 'regulate' based on the load.
The GND pin of the main connector is the chosen star point; bypass caps are connected to their IC ground pin rather than the star point, e.g. C1 and C2.

I know you can't comment on whether the circuit works or not but given your experience, does it look like I've taken a reasonable approach? The alternatives I can think of is to:

create one large ground plane on the bottom: I think this would be a poor approach because of the noisy U6 and U3 components polluting the ground and given this is a through-hole board, the plane is substantially broken up.
create small ground planes for each power sub-circuit and then link them all together at the ground pin of the power connector. Better than (1) but it doesn't feel as good as just routing grounds.

There's a lot of blank space on the bottom layer which I don't believe is an issue.

[View:/resized-image/__size/620x249/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/8463.contentimage_5F00_193691.png:620:249]

PCB bottom layer of 2-layer board. 140mm x 50mm

[View:/resized-image/__size/620x206/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/6320.contentimage_5F00_193692.png:620:206]

Schematic, just in case it helps. The 12V regulator, U2, feeds in to the +5V regulator, U1, and the charge pump inverter, U3, for the -5V regulator, U5.

RE: Ground Paths - Useful explanation for anyone who is confused.

genebren — Sat, 16 Jan 2021 21:55:59 GMT

Andrew,

One of the other things that I shared on your other post, was why I prefer not to use large scale power and ground planes. One reason follows along with the lines of the conversations above, in that it really can confuse you on where currents are flowing. By using a star pattern with explicit routing, you can control currents instead of leaving that up to the board. The other reason in the capacitive coupling of high frequency signals into the ground plane, from traces the cross over these large planes. This was a particularly shocking discovery that I was forced to deal with went I was developing a multiple channel data collection device. The board was generating clocking signals (high frequency, large voltage and current swings) for a CCD device, while reading the outputs of the CCD devices (relatively high impedance, low level voltages). The clocking signals were coupling into the CCD outputs (through the ground plane). This really effected our signal to noise ratios. This was the moment where I needed to do a lot of researching to first identify the sources of the noise and solutions to eliminating them. My findings were that the clock traces crossing over ground planes were parallel to the plane (no matter the direction or routing). I modified the PCB to use a star distribution and made sure that all high speed, high energy signals were routed such that they crossed the ground traces in a perpendicular manner and that where possible, the low level CCD outputs were guarded by ground (or other fixed bias signals). This approach greatly improved the signal to noise ratios and allow us to deliver a solution to our customers.

Another note about power and ground routing. Another product that I worked on used a high power laser (>100A), and relied on power and ground flooding to route energy to the laser. On version of the board worked well, but a subsequent version would burn and blister after a few attempts to drive the laser. The board layout contractor that we used had re-routed some logic traces and placed a couple of vias that broke up the power and ground paths for the laser. The resulting trace width of these paths was greatly reduced, without causing any warnings during the design rule checking. Had the traces been routed directly as opposed to flooding rectangles the issues would have shown up during design and not after boards were purchased and assembled.

RE: Ground Paths - Useful explanation for anyone who is confused.

Andrew J — Sat, 16 Jan 2021 18:28:42 GMT

I don't know, I understand "DC returns to source" but in the case of the signal from IC1 to IC2, where is DC sourced from? It would appear to be the Voltage Regulator OUT pin or possibly C5, but of course the Voltage Regulator is internally connected and power is sourced from the PSU or C3 (maybe C4 for line regulation??) so that could well be the Source as you say. This is where it's hard to get answers because the question is too hard to Google. Knowing the answer makes a difference to how you would choose the single point for a Star Ground. Slightly complicating things is that the Voltage Regulator maintains regulation by pulling a current in through it's ground pin which is best connected to the load, in this case the ground of IC1.

I think the importance for DC is the reference point for ground of all components as well as the separation of high current paths (as Gene refers to above.) In the generalise accuracy of hobbyist builds the reference point probably matters little compared to controlling noise but it's still something I'm interested in understanding better.

I'm creating a 150mm x 50mm 2 layer board and a 100mm x 100mm 4 layer board and the price for the 4 layer is slightly cheaper! That's JLCPCB prices.

RE: Ground Paths - Useful explanation for anyone who is confused.

Andrew J — Sat, 16 Jan 2021 13:53:20 GMT

The image above from Maxim shows a voltage source with DC current return to its GND pin. In the image below, using a ground plane, what would be the return point for DC current, A, B, C or D? For the ICs, it would appear that the Voltage Regulator is the DC source but that it actually sourced from an external power supply. Both these supplies are supported by large electrolytic caps on their outputs which can also provide an element of DC current for improving transients etc.

[View:/resized-image/__size/553x419/__key/commentfiles/f7d226abd59f475c9d224a79e3f0ec07-3382f99a-1ea2-4f60-beb0-1e591f273b66/4278.contentimage_5F00_193690.jpg:553:419]

RE: Ground Paths - Useful explanation for anyone who is confused.

genebren — Fri, 15 Jan 2021 20:22:25 GMT

Andrew,

I tend to only use a star approach, both for ground and also supply sources. This allows me to manage the high current signals in a way where current changes (noise) from devices are not shared across all IC's. This has worked very well for me, especially when I work with clients that have suffered through noise issues in the past. A recent customer requested that I supply two power connectors on a board (logic and motor supplies) as a prior design had spurious resets due to noise on the motor power rails. By isolating the power currents, using a star routing (both power and ground), I was able to demonstrate that the extra set of power connectors were not necessary (they were later removed in a cost saving measure in a redesign).

RE: Ground Paths - Useful explanation for anyone who is confused.

genebren — Fri, 15 Jan 2021 15:56:04 GMT

Andrew,

I am not seeing any of your images, you might want to make a small change and re-save your post.

I really do like the linked document by Maxim, some great images and documentation.

I once had a very good collection of papers (bound) by analog devices on the topic of grounding (handout at a conference or special offer on line?) that I have somehow lost. (lent out and not returned?).